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authorYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>2009-02-25 14:26:42 +0900
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2009-03-12 23:58:30 +0900
commit06b18163b57e6b0349b0c299222d50e7b1e41e50 (patch)
tree3f1e3665b801ef1c945ecdac1b11c46f18f48cd2
parent06e2735eb85cbea7cecb3c308d6d078b3651b22c (diff)
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sh: Add some register value configurable to PCI of SH7780
Some register value was hardcoded for System memory size 128MB and memory offset 0x08000000. This patch fixed the problem. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-rw-r--r--drivers/pci/pci_sh7780.c6
-rw-r--r--include/configs/r7780mp.h3
-rw-r--r--include/configs/sh7785lcr.h3
3 files changed, 9 insertions, 3 deletions
diff --git a/drivers/pci/pci_sh7780.c b/drivers/pci/pci_sh7780.c
index 7555d96..bc06f49 100644
--- a/drivers/pci/pci_sh7780.c
+++ b/drivers/pci/pci_sh7780.c
@@ -85,11 +85,11 @@ int pci_sh7780_init(struct pci_controller *hose)
p4_out(SH7780_PCICR_PREFIX, SH7780_PCICR);
p4_outw(0x0047, SH7780_PCICMD);
- p4_out(0x07F00001, SH7780_PCILSR0);
- p4_out(0x08000000, SH7780_PCILAR0);
+ p4_out(CONFIG_SH7780_PCI_LSR, SH7780_PCILSR0);
+ p4_out(CONFIG_SH7780_PCI_LAR, SH7780_PCILAR0);
p4_out(0x00000000, SH7780_PCILSR1);
p4_out(0, SH7780_PCILAR1);
- p4_out(0x08000000, SH7780_PCIMBAR0);
+ p4_out(CONFIG_SH7780_PCI_BAR, SH7780_PCIMBAR0);
p4_out(0x00000000, SH7780_PCIMBAR1);
p4_out(0xFD000000, SH7780_PCIMBR0);
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 72a3b5c..88eb568 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -129,6 +129,9 @@
#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7780_PCI
+#define CONFIG_SH7780_PCI_LSR 0x07f00001
+#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1
#define __io
diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index b4361ca..94c8d6b 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -133,6 +133,9 @@
#define CONFIG_PCI
#define CONFIG_SH4_PCI
#define CONFIG_SH7780_PCI
+#define CONFIG_SH7780_PCI_LSR 0x07f00001
+#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
+#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW 1