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authorWu, Josh <Josh.wu@atmel.com>2013-07-03 11:11:45 +0800
committerAndreas Bießmann <andreas.devel@googlemail.com>2013-08-22 16:50:16 +0200
commitb2d96dc28ffb2acad250ffb551a442396db83f38 (patch)
treebecd244bf5b62cc9f81ec95109b937ca12741479
parentce76f0aac6b340582f9f08cf6c3d063df97e419f (diff)
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ARM: at91: atmel_nand: pmecc driver will select the galois table by sector size
Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> [rebased on master] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
-rw-r--r--arch/arm/include/asm/arch-at91/at91sam9x5.h6
-rw-r--r--doc/README.atmel_pmecc14
-rw-r--r--drivers/mtd/nand/atmel_nand.c5
-rw-r--r--include/configs/at91sam9x5ek.h1
-rw-r--r--include/configs/sama5d3xek.h1
5 files changed, 10 insertions, 17 deletions
diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/include/asm/arch-at91/at91sam9x5.h
index fcc6fdc..a471038 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9x5.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9x5.h
@@ -162,6 +162,12 @@
#define ATMEL_ID_UHP ATMEL_ID_UHPHS
/*
+ * PMECC table in ROM
+ */
+#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
+#define ATMEL_PMECC_INDEX_OFFSET_1024 0x10000
+
+/*
* at91sam9x5 specific prototypes
*/
#ifndef __ASSEMBLY__
diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc
index b483744..41f3bd7 100644
--- a/doc/README.atmel_pmecc
+++ b/doc/README.atmel_pmecc
@@ -19,17 +19,6 @@ To use PMECC in this driver, the user needs to set:
It can be 2, 4, 8, 12 or 24.
2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE.
It only can be 512 or 1024.
- 3. The PMECC index lookup table's offsets in ROM code: CONFIG_PMECC_INDEX_TABLE_OFFSET.
- In the chip datasheet section "Boot Stragegies", you can find
- two Galois Field Table in the ROM code. One table is for 512-bytes
- sector. Another is for 1024-byte sector. Each Galois Field includes
- two sub-table: indext table & alpha table.
- In the beginning of each Galois Field Table is the index table,
- Alpha table is in the following.
- So the index table's offset is same as the Galois Field Table.
-
- Please set CONFIG_PMECC_INDEX_TABLE_OFFSET correctly according the
- Galois Field Table's offset base on the sector size you used.
Take AT91SAM9X5EK as an example, the board definition file likes:
@@ -38,7 +27,4 @@ Take AT91SAM9X5EK as an example, the board definition file likes:
#define CONFIG_ATMEL_NAND_HW_PMECC 1
#define CONFIG_PMECC_CAP 2
#define CONFIG_PMECC_SECTOR_SIZE 512
-#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
-NOTE: If you use 1024 as the sector size, then need set 0x10000 as the
- CONFIG_PMECC_INDEX_TABLE_OFFSET
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index f844990..304491b 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -637,7 +637,10 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
cap = host->pmecc_corr_cap = CONFIG_PMECC_CAP;
sector_size = host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE;
- host->pmecc_index_table_offset = CONFIG_PMECC_INDEX_TABLE_OFFSET;
+ if (host->pmecc_sector_size == 512)
+ host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_512;
+ else
+ host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_1024;
MTDDEBUG(MTD_DEBUG_LEVEL1,
"Initialize PMECC params, cap: %d, sector: %d\n",
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index b866a4b..c799955 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -121,7 +121,6 @@
#define CONFIG_ATMEL_NAND_HW_PMECC 1
#define CONFIG_PMECC_CAP 2
#define CONFIG_PMECC_SECTOR_SIZE 512
-#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
#define CONFIG_CMD_NAND_TRIMFFS
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 3dcf012..ab9617e 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -126,7 +126,6 @@
#define CONFIG_ATMEL_NAND_HW_PMECC
#define CONFIG_PMECC_CAP 4
#define CONFIG_PMECC_SECTOR_SIZE 512
-#define CONFIG_PMECC_INDEX_TABLE_OFFSET ATMEL_PMECC_INDEX_OFFSET_512
#define CONFIG_CMD_NAND_TRIMFFS
#endif