summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorShaohui Xie <Shaohui.Xie@freescale.com>2013-03-25 07:40:11 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:12 -0500
commit94025b1cd8d9959ebf987a7f6382d513c606ecf1 (patch)
tree81b67420a3cee8a1c889583bd76ab4695dd2e690
parentf41388159ac6b1a438ea65b6d326f976b99092e1 (diff)
downloadu-boot-imx-94025b1cd8d9959ebf987a7f6382d513c606ecf1.zip
u-boot-imx-94025b1cd8d9959ebf987a7f6382d513c606ecf1.tar.gz
u-boot-imx-94025b1cd8d9959ebf987a7f6382d513c606ecf1.tar.bz2
powerpc/p5040: enable PBL tool support
Provided a default RCW for P5040, then it can use PBL to build ramboot image. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
-rw-r--r--board/freescale/corenet_ds/rcw_p5040ds.cfg11
-rw-r--r--include/configs/corenet_ds.h2
2 files changed, 13 insertions, 0 deletions
diff --git a/board/freescale/corenet_ds/rcw_p5040ds.cfg b/board/freescale/corenet_ds/rcw_p5040ds.cfg
new file mode 100644
index 0000000..82fa741
--- /dev/null
+++ b/board/freescale/corenet_ds/rcw_p5040ds.cfg
@@ -0,0 +1,11 @@
+#
+# Default RCW for P5040DS.
+#
+
+#PBL preamble and RCW header
+aa55aa55 010e0100
+#64 bytes RCW data
+0c580000 00000000 22121200 00000000
+089c4400 00283000 58000000 61000000
+00000000 00000000 00000000 10070000
+00000000 00000000 00000000 00000000
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 5cc9b5a..2e2d439 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -38,6 +38,8 @@
#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg
#elif defined(CONFIG_P5020DS)
#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg
+#elif defined(CONFIG_P5040DS)
+#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg
#endif
#endif