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| author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2012-08-02 22:08:40 +0000 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2012-09-24 13:55:42 -0500 |
| commit | dcd5a593f59b58da4875e3e78d7c74501bc319c4 (patch) | |
| tree | 9851143f217c1216ca9bba288731576c13730a5a | |
| parent | 905b3b00a177a22944ee4b9e505e9395f23e58ed (diff) | |
| download | u-boot-imx-dcd5a593f59b58da4875e3e78d7c74501bc319c4.zip u-boot-imx-dcd5a593f59b58da4875e3e78d7c74501bc319c4.tar.gz u-boot-imx-dcd5a593f59b58da4875e3e78d7c74501bc319c4.tar.bz2 | |
net: sh_eth: Add support R8A7740 of rmobile (arm core)
R8A7740 of rmobile has ethernet device, and this is same IP of
sh-ether. This support R8A7740 of rmobile.
Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| -rw-r--r-- | drivers/net/sh_eth.c | 2 | ||||
| -rw-r--r-- | drivers/net/sh_eth.h | 14 |
2 files changed, 13 insertions, 3 deletions
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 09af860..2d9cc32 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -394,7 +394,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) sh_eth_write(eth, TPAUSER_TPAUSE, TPAUSER); #endif -#if defined(CONFIG_CPU_SH7734) +#if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740) sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII); #endif /* Configure phy */ diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 3703c55..61d2df9 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -1,8 +1,8 @@ /* * sh_eth.h - Driver for Renesas SuperH ethernet controler. * - * Copyright (C) 2008, 2011 Renesas Solutions Corp. - * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu + * Copyright (C) 2008 - 2012 Renesas Solutions Corp. + * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com> * * This program is free software; you can redistribute it and/or modify @@ -25,6 +25,7 @@ #define SHETHER_NAME "sh_eth" +#if defined(CONFIG_SH) /* Malloc returns addresses in the P1 area (cacheable). However we need to use area P2 (non-cacheable) */ #define ADDR_TO_P2(addr) ((((int)(addr) & ~0xe0000000) | 0xa0000000)) @@ -35,6 +36,12 @@ #else #define ADDR_TO_PHY(addr) ((int)(addr) & ~0xe0000000) #endif +#elif defined(CONFIG_ARM) +#define inl readl +#define outl writel +#define ADDR_TO_PHY(addr) ((int)(addr)) +#define ADDR_TO_P2(addr) (addr) +#endif /* defined(CONFIG_SH) */ /* Number of supported ports */ #define MAX_PORT_NUM 2 @@ -292,6 +299,9 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = { #elif defined(CONFIG_CPU_SH7724) #define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xA4600000 +#elif defined(CONFIG_R8A7740) +#define SH_ETH_TYPE_GETHER +#define BASE_IO_ADDR 0xE9A00000 #endif /* |