diff options
| author | Ye.Li <B37916@freescale.com> | 2015-04-04 14:46:05 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2015-04-05 14:21:57 +0800 |
| commit | 843c3c54af12cbf20e7bc912178e5a3628b78198 (patch) | |
| tree | df5d6112185c0f815cb6ee48080e2dbacf567dc4 | |
| parent | 0836912ef7a53d1f3d65f95556a34d03b8d65399 (diff) | |
| download | u-boot-imx-843c3c54af12cbf20e7bc912178e5a3628b78198.zip u-boot-imx-843c3c54af12cbf20e7bc912178e5a3628b78198.tar.gz u-boot-imx-843c3c54af12cbf20e7bc912178e5a3628b78198.tar.bz2 | |
MLK-10568 imx: mx7d arm2: Update LPDDR3 script to 7D_lpddr3_0_1.ds5
[The compass link for this script]
http://compass.freescale.net/livelink/livelinkfunc=ll&objid=233861153
&objAction=browse&sort=name
[Changes in the script]
1. Change the DDR freq to 528Mhz.
2. Disable ddr phy dll, just force a dll output. IC suspects the dll
in ddr phy may unlock sometimes. The side-effect is we will lost the
ability to compensate the voltage/temperature change, so it may easy
to fail at H/L temperature.
[DDR stress test result]
3 boards involved the two days stress test by using memtester tool.
One board met a kernel oops after one day test. Other two pass the
two days test.
Compared to previous DDR script, the result is much positive.
Signed-off-by: Ye.Li <B37916@freescale.com>
| -rw-r--r-- | board/freescale/mx7d_12x12_lpddr3_arm2/imximage.cfg | 35 |
1 files changed, 16 insertions, 19 deletions
diff --git a/board/freescale/mx7d_12x12_lpddr3_arm2/imximage.cfg b/board/freescale/mx7d_12x12_lpddr3_arm2/imximage.cfg index 6d23d1c..05df8f8 100644 --- a/board/freescale/mx7d_12x12_lpddr3_arm2/imximage.cfg +++ b/board/freescale/mx7d_12x12_lpddr3_arm2/imximage.cfg @@ -50,19 +50,10 @@ CSF 0x2000 * value value to be stored in the register */ - -DATA 4 0x30360070 0x00603021 -CHECK_BITS_SET 4 0x30360070 0x80000000 - DATA 4 0x30340004 0x4F400005 DATA 4 0x30391000 0x00000002 DATA 4 0x307a0000 0x03040008 - -DATA 4 0x307a01a0 0x80400003 -DATA 4 0x307a01a4 0x00100020 -DATA 4 0x307a01a8 0x80100004 - DATA 4 0x307a0064 0x00200038 DATA 4 0x307a0490 0x00000001 DATA 4 0x307a00d0 0x00350001 @@ -78,13 +69,19 @@ DATA 4 0x307a0110 0x05020307 DATA 4 0x307a0114 0x02020404 DATA 4 0x307a0118 0x02020003 DATA 4 0x307a011c 0x00000202 +DATA 4 0x307a0120 0x00000202 + DATA 4 0x307a0180 0x00600018 DATA 4 0x307a0184 0x00e00100 DATA 4 0x307a0190 0x02098205 DATA 4 0x307a0194 0x00060303 +DATA 4 0x307a01a0 0x80400003 +DATA 4 0x307a01a4 0x00100020 +DATA 4 0x307a01a8 0x80100004 DATA 4 0x307a0200 0x00000016 DATA 4 0x307a0204 0x00171717 +DATA 4 0x307a0210 0x00000f00 DATA 4 0x307a0214 0x05050505 DATA 4 0x307a0218 0x0f0f0505 @@ -95,27 +92,27 @@ DATA 4 0x30790000 0x17421e40 DATA 4 0x30790004 0x10210100 DATA 4 0x30790008 0x00010000 DATA 4 0x30790010 0x0007080c +DATA 4 0x307900b0 0x10103750 + DATA 4 0x3079001C 0x01010000 +DATA 4 0x3079009c 0x0db60d6e -DATA 4 0x3079009c 0x00000d6e -DATA 4 0x30790020 0x0a0c0a0a DATA 4 0x30790030 0x06060606 +DATA 4 0x30790020 0x0a0a0a0a DATA 4 0x30790050 0x01000008 DATA 4 0x30790050 0x00000008 -DATA 4 0x307900c0 0x0e407304 -DATA 4 0x307900c0 0x0e447304 -DATA 4 0x307900c0 0x0e447306 - +DATA 4 0x30790018 0x0000000f +DATA 4 0x307900c0 0x1e487304 +DATA 4 0x307900c0 0x1e487304 +DATA 4 0x307900c0 0x1e487306 +DATA 4 0x307900c0 0x1e4c7304 CHECK_BITS_SET 4 0x307900c4 0x1 -DATA 4 0x307900c0 0x0e4c7304 -DATA 4 0x307900c0 0x0e487306 +DATA 4 0x307900c0 0x1e487304 DATA 4 0x30384130 0x00000000 DATA 4 0x30340020 0x00000178 DATA 4 0x30384130 0x00000002 -DATA 4 0x30790018 0x0000000f - CHECK_BITS_SET 4 0x307a0004 0x1 #endif |