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authorYe.Li <B37916@freescale.com>2015-03-23 16:08:46 +0800
committerYe.Li <B37916@freescale.com>2015-03-23 22:30:34 +0800
commit089f399ea07db79d6bca8fdc08b442b59eb55feb (patch)
treea0050c6bbadd87315a0158e7556400941c4c8f18
parent96e13b57ead3ed00c3a32c5373c7a2a876947f99 (diff)
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MLK-10448-5 imx: mx6qp: Enable PRG clock for IPU
The i.MX6QP has a PRG module, need to enable its clock for using IPU. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Brown Oliver <B37094@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index fff7d3b..9bda4f7 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -940,6 +940,12 @@ void enable_ipu_clock(void)
reg = readl(&mxc_ccm->CCGR3);
reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;
writel(reg, &mxc_ccm->CCGR3);
+
+#ifdef CONFIG_MX6QP
+ reg = readl(&mxc_ccm->CCGR6);
+ reg |= MXC_CCM_CCGR6_PRG_CLK0_MASK;
+ writel(reg, &mxc_ccm->CCGR6);
+#endif
}
#endif
/***************************************************/