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authorFugang Duan <b38611@freescale.com>2015-04-20 18:28:48 +0800
committerFugang Duan <b38611@freescale.com>2015-04-21 10:30:43 +0800
commit0373a160e7f698064a6625e85f9120b6c81c1b61 (patch)
treeac516882e429a285932c25d69b5ae3f829727652
parent61cec88a59ebf450dd1352d81e03b5aa842e1d71 (diff)
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MLK-10701 net: fec_mxc: setup right value for mdio hold time
The minimal hold time according to IEE802.3 (clause 22) is 10 ns. HOLDTIME + 1 is the number of clk cycles the fec is holding the output. Set the right hold time value when the MDC root clock is greater than 100Mhz. The issue was reported on i.MX28 and is fixed by Uwe Kleine-König in kernel: https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/ drivers/net/ethernet/freescale/fec_main.c?id=63c607321492c5efc7a31bc4ea734b877f8e7f87 Signed-off-by: Fugang Duan <B38611@freescale.com>
-rw-r--r--drivers/net/fec_mxc.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 56b7628..5fe1975 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -129,11 +129,13 @@ static void fec_mii_setspeed(struct ethernet_regs *eth)
* and do not drop the Preamble.
*/
register u32 speed = DIV_ROUND_UP(imx_get_fecclk(), 5000000);
+ register u32 holdtime = DIV_ROUND_UP(imx_get_fecclk(), 100000000) - 1;
#ifdef FEC_QUIRK_ENET_MAC
speed--;
#endif
speed <<= 1;
- writel(speed, &eth->mii_speed);
+ holdtime <<= 8;
+ writel(speed | holdtime, &eth->mii_speed);
debug("%s: mii_speed %08x\n", __func__, readl(&eth->mii_speed));
}