summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTom Warren <twarren@nvidia.com>2013-01-18 13:36:26 -0700
committerTom Warren <twarren@nvidia.com>2013-02-11 10:35:23 -0700
commitd83152d8e42940d193589b351f874a8600335468 (patch)
treef1714159f6481c7202543eb0fb78ad50052640cf
parent36068ae75e24485d9a6ef5c2dee1f7d0dacdd6d5 (diff)
downloadu-boot-imx-d83152d8e42940d193589b351f874a8600335468.zip
u-boot-imx-d83152d8e42940d193589b351f874a8600335468.tar.gz
u-boot-imx-d83152d8e42940d193589b351f874a8600335468.tar.bz2
Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry
Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--arch/arm/cpu/arm720t/tegra-common/cpu.c7
-rw-r--r--arch/arm/include/asm/arch-tegra/tegra.h1
2 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c b/arch/arm/cpu/arm720t/tegra-common/cpu.c
index 693d584..c32925b 100644
--- a/arch/arm/cpu/arm720t/tegra-common/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra-common/cpu.c
@@ -75,13 +75,6 @@ struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = {
{ 700, 6, 0, 8},
{ 700, 13, 0, 8},
},
-
- /* TEGRA_SOC2_SLOW: 312 MHz */
- {{ 312, 13, 0, 12}, /* OSC 13M */
- { 260, 16, 0, 8}, /* OSC 19.2M */
- { 312, 12, 0, 12}, /* OSC 12M */
- { 312, 26, 0, 12}, /* OSC 26M */
- },
};
void adjust_pllp_out_freqs(void)
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 953936c..013a3c5 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -85,7 +85,6 @@ enum {
TEGRA_SOC_T20,
TEGRA_SOC_T25,
TEGRA_SOC_T30,
- TEGRA_SOC2_SLOW, /* T2x needs to run at slow clock initially */
TEGRA_SOC_CNT,
TEGRA_SOC_UNKNOWN = -1,