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authorScott Wood <scottwood@freescale.com>2012-08-08 15:06:18 +0000
committerAndy Fleming <afleming@freescale.com>2012-08-23 12:49:48 -0500
commitd69dba367aed051663d0ee1ece013c8232bfa9f5 (patch)
treebd42cf8219fcdbe8ea8fe6367fa5019dee696837
parent98ae9ac434debd96a86ed8d4b6714d757860838c (diff)
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powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL
LAW init is skipped in the SPL payload because it's assumed that the SPL has taken care of it -- so make sure the SPL loads all the LAWs as is done on other boards. This bug was introduced by: commit 4589728e214958a4e6e011a081a68d360c49d7a5 Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Nov 11 08:14:53 2011 -0600 powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing LAW entries not needed during SPL phase. Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--board/freescale/p1_p2_rdb_pc/law.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 7968919..0da8300 100644
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -25,13 +25,11 @@
#include <asm/mmu.h>
struct law_entry law_table[] = {
-#ifndef CONFIG_NAND_SPL
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
#ifdef CONFIG_VSC7385_ENET
SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
#endif
-#endif
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
#ifdef CONFIG_SYS_NAND_BASE_PHYS
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),