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authorJon Loeliger <jdl@freescale.com>2007-11-01 12:23:29 -0500
committerWolfgang Denk <wd@denx.de>2007-11-17 00:58:10 +0100
commitd08b7233bc252faad8339e7ca0ddfd62fa79903c (patch)
tree45f5c0e59c151d4a09e9b1c557ae731949a8ab57
parentf9d9164d9c6b5a7f0393fd8d7e246b8a0326bc19 (diff)
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86xx: Fix broken variable reference when #def DEBUGing.
Sometimes you can't reference the DDR2 controller variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
-rw-r--r--cpu/mpc86xx/spd_sdram.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index 059097f..d57bcdf 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -1270,10 +1270,12 @@ spd_sdram(void)
debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8);
debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8);
}
+
+ debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2);
+
#endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */
- debug("\nMemory sizes are DDR1 = 0x%08lx, DDR2 = 0x%08lx\n",
- memsize_ddr1, memsize_ddr2);
+ debug("\nMemory size of DDR1 = 0x%08lx\n", memsize_ddr1);
/*
* If neither DDR controller is enabled return 0.