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authorWolfgang Denk <wd@pollux.denx.de>2006-08-18 15:23:10 +0200
committerWolfgang Denk <wd@pollux.denx.de>2006-08-18 15:23:10 +0200
commitc5185470fef2d4d94e78f57e92f3d88b7d11857c (patch)
tree61cc84225fa288a5114b639181837848d04364df
parent4bfb63207765e9048668eb1fe17ac51b02662635 (diff)
parent6fe16a8769a3c8923dea24a7ed9ff7f1f89c3bef (diff)
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Merge with /home/raj/git/u-boot
-rw-r--r--CHANGELOG2
-rw-r--r--include/configs/TQM834x.h19
2 files changed, 16 insertions, 5 deletions
diff --git a/CHANGELOG b/CHANGELOG
index ff6eadb..e40de36 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
Changes since U-Boot 1.1.4:
======================================================================
+* Fix TQM834x hang.
+
* Update for SC520 board.
Patch by David Updegraff, 02 Dec 2005
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index cec7e3e..92c7016 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -422,9 +422,9 @@ extern int tqm834x_num_flash_banks;
#define CFG_SICRL SICRL_LDP_A
/* i-cache and d-cache disabled */
-#define CFG_HID0_INIT 0x000000000
-#define CFG_HID0_FINAL CFG_HID0_INIT
-#define CFG_HID2 0x000000000
+#define CFG_HID0_INIT 0x000000000
+#define CFG_HID0_FINAL CFG_HID0_INIT
+#define CFG_HID2 HID2_HBE
/* DDR 0 - 512M */
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
@@ -437,12 +437,21 @@ extern int tqm834x_num_flash_banks;
#define CFG_IBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
/* PCI */
-#define CFG_IBAT3L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#ifdef CONFIG_PCI
+#define CFG_IBAT3L (CFG_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT3U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CFG_IBAT4L (CFG_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT4L (CFG_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT4U (CFG_PCI1_MEM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP)
#define CFG_IBAT5L (CFG_PCI1_IO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
#define CFG_IBAT5U (CFG_PCI1_IO_BASE + 0x10000000 | BATU_BL_16M | BATU_VS | BATU_VP)
+#else
+#define CFG_IBAT3L (0)
+#define CFG_IBAT3U (0)
+#define CFG_IBAT4L (0)
+#define CFG_IBAT4U (0)
+#define CFG_IBAT5L (0)
+#define CFG_IBAT5U (0)
+#endif
/* IMMRBAR */
#define CFG_IBAT6L (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)