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authorTom Warren <twarren@nvidia.com>2013-03-13 15:00:54 -0700
committerTom Warren <twarren@nvidia.com>2013-03-14 11:08:57 -0700
commitb3b6ddff0bb6768af7532da4cee5362fbe41ec4b (patch)
tree19074e6f6adf75519c6456fac6479d14aac83888
parent11d9c0303949c2e9c2a176f81c0d7355c76bb546 (diff)
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Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entry
This caused CAM_MCLK's pinmux reg to be locked out, since the table parsing code couldn't find a matching entry for VI_ALT3 and wrote garbage to the register. Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--arch/arm/cpu/tegra114-common/pinmux.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/tegra114-common/pinmux.c b/arch/arm/cpu/tegra114-common/pinmux.c
index 27b5f69..16368c5 100644
--- a/arch/arm/cpu/tegra114-common/pinmux.c
+++ b/arch/arm/cpu/tegra114-common/pinmux.c
@@ -226,7 +226,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[PINGRP_COUNT] = {
PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
PIN_RESERVED, /* Reserved by t114: 0x3280 */
- PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT2, RSVD4),
+ PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4),
PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4),
PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3),
PINI(CAM_I2C_SCL, CAM, VGP1, I2C3, RSVD3, RSVD4),