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authorPaul Burton <paul.burton@imgtec.com>2013-11-08 11:18:57 +0000
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2013-11-09 17:21:02 +0100
commit81f98bbd62b66e4a590fe6fe9b0d8231e45beffd (patch)
treeb7ea029d769b9c014983faa2c55f3e4302d1145e
parentfba6f45cdcf77985c4bf891322b5442bda1005e0 (diff)
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malta: setup PIIX4 interrupt route
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will be left disabled. Linux does not set up this routing but relies upon it having been set up by the bootloader, reading back the IRQ lines which the PIRQ[A:D] signals have been routed to. This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11. This matches the setup used by YAMON. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
-rw-r--r--arch/mips/include/asm/malta.h5
-rw-r--r--board/imgtec/malta/malta.c14
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/malta.h b/arch/mips/include/asm/malta.h
index d8ec57c..e141eb0 100644
--- a/arch/mips/include/asm/malta.h
+++ b/arch/mips/include/asm/malta.h
@@ -53,4 +53,9 @@
#define MALTA_REVISION_CORID_CORE_LV 1
#define MALTA_REVISION_CORID_CORE_FPGA6 14
+#define PCI_CFG_PIIX4_PIRQRCA 0x60
+#define PCI_CFG_PIIX4_PIRQRCB 0x61
+#define PCI_CFG_PIIX4_PIRQRCC 0x62
+#define PCI_CFG_PIIX4_PIRQRCD 0x63
+
#endif /* _MIPS_ASM_MALTA_H */
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index 2f92259..a1a4c01 100644
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <netdev.h>
+#include <pci.h>
#include <pci_gt64120.h>
#include <pci_msc01.h>
#include <rtc.h>
@@ -169,6 +170,8 @@ struct serial_device *default_serial_console(void)
void pci_init_board(void)
{
+ pci_dev_t bdf;
+
switch (malta_sys_con()) {
case SYSCON_GT64120:
set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE));
@@ -191,4 +194,15 @@ void pci_init_board(void)
0x00000000, MALTA_MSC01_PCIIO_SIZE);
break;
}
+
+ bdf = pci_find_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_82371AB_0, 0);
+ if (bdf == -1)
+ panic("Failed to find PIIX4 PCI bridge\n");
+
+ /* setup PCI interrupt routing */
+ pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCA, 10);
+ pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCB, 10);
+ pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCC, 11);
+ pci_write_config_byte(bdf, PCI_CFG_PIIX4_PIRQRCD, 11);
}