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authorTsiChung Liew <tsicliew@gmail.com>2010-03-11 15:04:21 -0600
committerTsiChung Liew <tsicliew@gmail.com>2010-03-24 11:09:10 -0500
commit68e4e76af55746a4330865f56476e58ce4140ca8 (patch)
tree66f56b371fed59c7f8e173ae27c4e681cb27de4a
parentfa9da596212d7f28eb26a3257d79d9515f9838cd (diff)
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ColdFire: Relocate vector table - mcf5445x
Newer ColdFire processors family boot from address 0 instead of 0xFFnn_nnnn. When the boot flash base chip select is set at new location instead of 0, an un-predictable error will occur if there is an vector being trigger and refer it to an invalid address or the vector table handler is not existed at address 0. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
-rw-r--r--cpu/mcf5445x/cpu_init.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c
index 00e0ca6..8d51d35 100644
--- a/cpu/mcf5445x/cpu_init.c
+++ b/cpu/mcf5445x/cpu_init.c
@@ -28,6 +28,7 @@
#include <common.h>
#include <watchdog.h>
#include <asm/immap.h>
+#include <asm/processor.h>
#include <asm/rtc.h>
#if defined(CONFIG_CMD_NET)
@@ -105,6 +106,14 @@ void cpu_init_f(void)
fbcs->csmr5 = CONFIG_SYS_CS5_MASK;
#endif
+ /*
+ * now the flash base address is no longer at 0 (Newer ColdFire family
+ * boot at address 0 instead of 0xFFnn_nnnn). The vector table must
+ * also move to the new location.
+ */
+ if (CONFIG_SYS_CS0_BASE != 0)
+ setvbr(CONFIG_SYS_CS0_BASE);
+
#ifdef CONFIG_FSL_I2C
gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA;
#endif