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author | Becky Bruce <beckyb@kernel.crashing.org> | 2011-07-13 17:11:57 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-07-13 21:27:19 -0500 |
commit | 1930b1037fd63b53c416e9c48ca3df31cdaa17aa (patch) | |
tree | 487bcfe2ab36699e46aaca423531e6dd8a72d57d | |
parent | 68d4230c3ccce96a72c5b99e48399bf1796fe3c6 (diff) | |
download | u-boot-imx-1930b1037fd63b53c416e9c48ca3df31cdaa17aa.zip u-boot-imx-1930b1037fd63b53c416e9c48ca3df31cdaa17aa.tar.gz u-boot-imx-1930b1037fd63b53c416e9c48ca3df31cdaa17aa.tar.bz2 |
powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum define
This erratum doesn't exist on this processor, and the workaround
spins on a non-existent register, causing boot to hang.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | include/configs/MPC8548CDS.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 0c0ae02..c9a0f60 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -91,7 +91,6 @@ extern unsigned long get_clock_freq(void); #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN /* possible DLL fix needed */ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef |