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| author | Ye.Li <B37916@freescale.com> | 2014-06-03 13:53:36 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-06-17 11:13:39 +0800 |
| commit | 0c08d5b675d1edcd1f35a407a90fdd31d9a51d97 (patch) | |
| tree | ea70684f7b69f3d1f4152c9fd6cfad900df57f47 | |
| parent | c9458846c210476201f483e3cd9949a00a2c996c (diff) | |
| download | u-boot-imx-0c08d5b675d1edcd1f35a407a90fdd31d9a51d97.zip u-boot-imx-0c08d5b675d1edcd1f35a407a90fdd31d9a51d97.tar.gz u-boot-imx-0c08d5b675d1edcd1f35a407a90fdd31d9a51d97.tar.bz2 | |
ENGR00315894-5 i.mx6:sabreauto: Add the i.MX6DL sabreauto board support
This patch is to add the i.MX6DL sabreauto board support.
i.MX6DL sabreauto board share the same design with i.MX6Q
sabreauto board except the SOC difference.
The DDR script has been updated to the v0.2 version from
ddr-scripts-rel.git, the commit based on is:
bfd157a Updated MX6DL and MX6DQ ARD and SabreSD scripts
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
| -rw-r--r-- | board/freescale/mx6qsabreauto/mx6dl.cfg | 146 | ||||
| -rw-r--r-- | board/freescale/mx6qsabreauto/mx6qsabreauto.c | 2 | ||||
| -rw-r--r-- | boards.cfg | 1 |
3 files changed, 148 insertions, 1 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6dl.cfg b/board/freescale/mx6qsabreauto/mx6dl.cfg new file mode 100644 index 0000000..1688610 --- /dev/null +++ b/board/freescale/mx6qsabreauto/mx6dl.cfg @@ -0,0 +1,146 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * Jason Liu <r64343@freescale.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4, 0x020e0774, 0x000C0000 +DATA 4, 0x020e0754, 0x00000000 +DATA 4, 0x020e04ac, 0x00000030 +DATA 4, 0x020e04b0, 0x00000030 +DATA 4, 0x020e0464, 0x00000030 +DATA 4, 0x020e0490, 0x00000030 +DATA 4, 0x020e074c, 0x00000030 +DATA 4, 0x020e0494, 0x00000030 +DATA 4, 0x020e04a0, 0x00000000 +DATA 4, 0x020e04b4, 0x00000030 +DATA 4, 0x020e04b8, 0x00000030 +DATA 4, 0x020e076c, 0x00000030 +DATA 4, 0x020e0750, 0x00020000 +DATA 4, 0x020e04bc, 0x00000028 +DATA 4, 0x020e04c0, 0x00000028 +DATA 4, 0x020e04c4, 0x00000028 +DATA 4, 0x020e04c8, 0x00000028 +DATA 4, 0x020e04cc, 0x00000028 +DATA 4, 0x020e04d0, 0x00000028 +DATA 4, 0x020e04d4, 0x00000028 +DATA 4, 0x020e04d8, 0x00000028 +DATA 4, 0x020e0760, 0x00020000 +DATA 4, 0x020e0764, 0x00000028 +DATA 4, 0x020e0770, 0x00000028 +DATA 4, 0x020e0778, 0x00000028 +DATA 4, 0x020e077c, 0x00000028 +DATA 4, 0x020e0780, 0x00000028 +DATA 4, 0x020e0784, 0x00000028 +DATA 4, 0x020e078c, 0x00000028 +DATA 4, 0x020e0748, 0x00000028 +DATA 4, 0x020e0470, 0x00000028 +DATA 4, 0x020e0474, 0x00000028 +DATA 4, 0x020e0478, 0x00000028 +DATA 4, 0x020e047c, 0x00000028 +DATA 4, 0x020e0480, 0x00000028 +DATA 4, 0x020e0484, 0x00000028 +DATA 4, 0x020e0488, 0x00000028 +DATA 4, 0x020e048c, 0x00000028 +DATA 4, 0x021b0800, 0xa1390003 +DATA 4, 0x021b080c, 0x001F001F +DATA 4, 0x021b0810, 0x001F001F +DATA 4, 0x021b480c, 0x001F001F +DATA 4, 0x021b4810, 0x001F001F +DATA 4, 0x021b083c, 0x42190217 +DATA 4, 0x021b0840, 0x017B017B +DATA 4, 0x021b483c, 0x4176017B +DATA 4, 0x021b4840, 0x015F016C +DATA 4, 0x021b0848, 0x4C4C4D4C +DATA 4, 0x021b4848, 0x4A4D4C48 +DATA 4, 0x021b0850, 0x3F3F3F40 +DATA 4, 0x021b4850, 0x3538382E +DATA 4, 0x021b081c, 0x33333333 +DATA 4, 0x021b0820, 0x33333333 +DATA 4, 0x021b0824, 0x33333333 +DATA 4, 0x021b0828, 0x33333333 +DATA 4, 0x021b481c, 0x33333333 +DATA 4, 0x021b4820, 0x33333333 +DATA 4, 0x021b4824, 0x33333333 +DATA 4, 0x021b4828, 0x33333333 +DATA 4, 0x021b08b8, 0x00000800 +DATA 4, 0x021b48b8, 0x00000800 +DATA 4, 0x021b0004, 0x00020025 +DATA 4, 0x021b0008, 0x00333030 +DATA 4, 0x021b000c, 0x676B5313 +DATA 4, 0x021b0010, 0xB66E8B63 +DATA 4, 0x021b0014, 0x01FF00DB +DATA 4, 0x021b0018, 0x00001740 +DATA 4, 0x021b001c, 0x00008000 +DATA 4, 0x021b002c, 0x000026d2 +DATA 4, 0x021b0030, 0x006B1023 +DATA 4, 0x021b0040, 0x00000047 +DATA 4, 0x021b0000, 0x841A0000 +DATA 4, 0x021b001c, 0x04008032 +DATA 4, 0x021b001c, 0x00008033 +DATA 4, 0x021b001c, 0x00048031 +DATA 4, 0x021b001c, 0x05208030 +DATA 4, 0x021b001c, 0x04008040 +DATA 4, 0x021b0020, 0x00005800 +DATA 4, 0x021b0818, 0x00011117 +DATA 4, 0x021b4818, 0x00011117 +DATA 4, 0x021b0004, 0x00025565 +DATA 4, 0x021b0404, 0x00011006 +DATA 4, 0x021b001c, 0x00000000 + +/* set the default clock gate to save power */ +DATA 4, 0x020c4068, 0x00C03F3F +DATA 4, 0x020c406c, 0x0030FC03 +DATA 4, 0x020c4070, 0x0FFFC000 +DATA 4, 0x020c4074, 0x3FF00000 +DATA 4, 0x020c4078, 0x00FFF300 +DATA 4, 0x020c407c, 0x0F0000C3 +DATA 4, 0x020c4080, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, 0x020e0010, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, 0x020e0018, 0x007F007F +DATA 4, 0x020e001c, 0x007F007F diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 43e90b0..aca2c60 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -626,7 +626,7 @@ int checkboard(void) break; } - printf("Board: MX6Q-Sabreauto rev%s\n", revname); + printf("Board: MX6-Sabreauto rev%s\n", revname); return 0; } @@ -319,6 +319,7 @@ Active arm armv7 mx6 boundary nitrogen6x Active arm armv7 mx6 congatec cgtqmx6eval cgtqmx6qeval cgtqmx6eval:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q Leo Sartre <lsartre@adeneo-embedded.com> Active arm armv7 mx6 freescale mx6qarm2 mx6qarm2 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg Jason Liu <r64343@freescale.com> Active arm armv7 mx6 freescale mx6qsabreauto mx6qsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com> +Active arm armv7 mx6 freescale mx6qsabreauto mx6dlsabreauto mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048 Fabio Estevam <fabio.estevam@freescale.com> Active arm armv7 mx6 freescale mx6sabresd mx6dlsabresd mx6sabresd:IMX_CONFIG=board/freescale/mx6sabresd/mx6dl_4x_mt41j128.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=1024 Fabio Estevam <fabio.estevam@freescale.com> Active arm armv7 mx6 freescale mx6sabresd mx6qsabresd mx6sabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024 Fabio Estevam <fabio.estevam@freescale.com> Active arm armv7 mx6 freescale mx6sabresd mx6solosabresd mx6sabresd:IMX_CONFIG=board/freescale/mx6sabresd/mx6solo_4x_mt41j128.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=512 Fabio Estevam <fabio.estevam@freescale.com> |