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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-07-19 01:35:32 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-21 23:24:25 +0200
commitf8f09dd40423b7f9ea0f0b810a8f5da9cd580a17 (patch)
treeeb9a6ebe8211cf7af024a363757b169a8c543069
parent6b8ac524e7bcfd4853bb4f494e539a63d894a46f (diff)
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ARM1136: Fix cache range checks
bad_cache_range actually returned true if the range was OK, but it was used according to its name, which resulted in all valid dcache range invalidate/flush operations being dropped. Hence, most DMA transfers resulted in garbage data. This patch renames this function according to what it does, and it fixes the interpretation of its return value by other functions. The chosen naming is the same as for ARM926EJ-S in order to be consistent. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/cpu/arm1136/cpu.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c
index f72bab6..b98e3d9 100644
--- a/arch/arm/cpu/arm1136/cpu.c
+++ b/arch/arm/cpu/arm1136/cpu.c
@@ -95,7 +95,7 @@ void flush_dcache_all(void)
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
-static inline int bad_cache_range(unsigned long start, unsigned long stop)
+static int check_cache_range(unsigned long start, unsigned long stop)
{
int ok = 1;
@@ -114,7 +114,7 @@ static inline int bad_cache_range(unsigned long start, unsigned long stop)
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
- if (bad_cache_range(start, stop))
+ if (!check_cache_range(start, stop))
return;
while (start < stop) {
@@ -125,7 +125,7 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop)
void flush_dcache_range(unsigned long start, unsigned long stop)
{
- if (bad_cache_range(start, stop))
+ if (!check_cache_range(start, stop))
return;
while (start < stop) {