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| author | Matthias Fuchs <matthias.fuchs@esd.eu> | 2009-07-20 12:15:38 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-07-24 06:47:33 +0200 |
| commit | da799f66ad1d4fc36dd20cc2d7e584493fda8546 (patch) | |
| tree | cdf3954e489851534d370df73da68f043971cce8 | |
| parent | 58ea142fb2e969f32306c8da1dabfaebd6fa141a (diff) | |
| download | u-boot-imx-da799f66ad1d4fc36dd20cc2d7e584493fda8546.zip u-boot-imx-da799f66ad1d4fc36dd20cc2d7e584493fda8546.tar.gz u-boot-imx-da799f66ad1d4fc36dd20cc2d7e584493fda8546.tar.bz2 | |
ppc4xx: Add struct for 4xx GPIO controller registers
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | include/asm-ppc/gpio.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/asm-ppc/gpio.h b/include/asm-ppc/gpio.h index fc05dc0..23e29b1 100644 --- a/include/asm-ppc/gpio.h +++ b/include/asm-ppc/gpio.h @@ -24,6 +24,8 @@ #ifndef __ASM_PPC_GPIO_H #define __ASM_PPC_GPIO_H +#include <asm/types.h> + /* 4xx PPC's have 2 GPIO controllers */ #if defined(CONFIG_405EZ) || \ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ @@ -34,6 +36,28 @@ #define GPIO_GROUP_MAX 1 #endif +/* GPIO controller */ +struct ppc4xx_gpio { + u32 or; /* Output Control */ + u32 tcr; /* Tri-State Control */ + u32 osl; /* Output Select 16..31 */ + u32 osh; /* Output Select 0..15 */ + u32 tsl; /* Tri-State Select 16..31 */ + u32 tsh; /* Tri-State Select 0..15 */ + u32 odr; /* Open Drain */ + u32 ir; /* Input */ + u32 rr1; /* Receive Register 1 */ + u32 rr2; /* Receive Register 2 */ + u32 rr3; /* Receive Register 3 */ + u32 reserved; + u32 is1l; /* Input Select 1 16..31 */ + u32 is1h; /* Input Select 1 0..15 */ + u32 is2l; /* Input Select 2 16..31 */ + u32 is2h; /* Input Select 2 0..15 */ + u32 is3l; /* Input Select 3 16..31 */ + u32 is3h; /* Input Select 3 0..15 */ +}; + /* Offsets */ #define GPIOx_OR 0x00 /* GPIO Output Register */ #define GPIOx_TCR 0x04 /* GPIO Three-State Control Register */ |