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author | Fugang Duan <B38611@freescale.com> | 2013-08-15 08:38:48 +0800 |
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committer | Fugang Duan <B38611@freescale.com> | 2013-08-15 13:52:41 +0800 |
commit | ced7a7619fa6dd28cbc8d1ffc7d8969e4f64ddc8 (patch) | |
tree | 48e2546c16720ec85e7618810c41082df766c2a5 | |
parent | 7ea8930361c2e884f933a56e2b48ba033892a08f (diff) | |
download | u-boot-imx-ced7a7619fa6dd28cbc8d1ffc7d8969e4f64ddc8.zip u-boot-imx-ced7a7619fa6dd28cbc8d1ffc7d8969e4f64ddc8.tar.gz u-boot-imx-ced7a7619fa6dd28cbc8d1ffc7d8969e4f64ddc8.tar.bz2 |
ENGR00275369-03: net: fec: add imx6sl fec support
imx6sl fec need to setup the MII gasket for RMII mode.
Add the imx6sl fec support.
Signed-off-by: Fugang Duan <B38611@freescale.com>
-rw-r--r-- | drivers/net/fec_mxc.c | 2 | ||||
-rw-r--r-- | drivers/net/fec_mxc.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 4dbcdca..2f46482 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -466,7 +466,7 @@ static int fec_open(struct eth_device *edev) */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl); -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) udelay(100); /* * setup the MII gasket for RMII mode diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index b8f0da3..7e4e198 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -149,7 +149,7 @@ struct ethernet_regs { uint32_t res14[7]; /* MBAR_ETH + 0x2E4-2FC */ -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) uint16_t miigsk_cfgr; /* MBAR_ETH + 0x300 */ uint16_t res15[3]; /* MBAR_ETH + 0x302-306 */ uint16_t miigsk_enr; /* MBAR_ETH + 0x308 */ @@ -216,7 +216,7 @@ struct ethernet_regs { #define FEC_X_DES_ACTIVE_TDAR 0x01000000 #define FEC_R_DES_ACTIVE_RDAR 0x01000000 -#if defined(CONFIG_MX25) || defined(CONFIG_MX53) +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL) /* defines for MIIGSK */ /* RMII frequency control: 0=50MHz, 1=5MHz */ #define MIIGSK_CFGR_FRCONT (1 << 6) |