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author | Fugang Duan <B38611@freescale.com> | 2013-08-15 13:57:13 +0800 |
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committer | Fugang Duan <B38611@freescale.com> | 2013-08-15 17:03:54 +0800 |
commit | cc467b169fb6d8e53b295b1a1f4e2b7352b84c67 (patch) | |
tree | df78c3c6676483b198c6f049653c28a0af592f34 | |
parent | 7e510971ff7d07e862141a81818ba466a0f06fa1 (diff) | |
download | u-boot-imx-cc467b169fb6d8e53b295b1a1f4e2b7352b84c67.zip u-boot-imx-cc467b169fb6d8e53b295b1a1f4e2b7352b84c67.tar.gz u-boot-imx-cc467b169fb6d8e53b295b1a1f4e2b7352b84c67.tar.bz2 |
ENGR00275413-01: ARM: MSL: add i2c0 support for imx6sl evk
- Add i2c0 support for imx6sl evk platform.
- Read pmic device ID and revsion ID.
Signed-off-by: Fugang Duan <B38611@freescale.com>
-rw-r--r-- | arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 | ||||
-rw-r--r-- | board/freescale/mx6slevk/mx6slevk.c | 64 |
2 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 0825969..cdfeb5f 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -33,5 +33,10 @@ enum { MX6_PAD_FEC_REF_CLK__FEC_REF_OUT = IOMUX_PAD(0x424, 0x134, 0x10, 0x000, 0, 0), MX6_PAD_FEC_RX_ER__GPIO_4_19 = IOMUX_PAD(0x0428, 0x0138, 5, 0x0000, 0, 0), MX6_PAD_FEC_TX_CLK__GPIO_4_21 = IOMUX_PAD(0x0434, 0x0144, 5, 0x0000, 0, 0), + + MX6_PAD_I2C1_SDA__I2C1_SDA = IOMUX_PAD(0x0450, 0x0160, 0x10, 0x0720, 2, 0), + MX6_PAD_I2C1_SDA__GPIO_3_13 = IOMUX_PAD(0x0450, 0x0160, 5, 0x0000, 0, 0), + MX6_PAD_I2C1_SCL__I2C1_SCL = IOMUX_PAD(0x044C, 0x015C, 0x10, 0x071C, 2, 0), + MX6_PAD_I2C1_SCL__GPIO_3_12 = IOMUX_PAD(0x044C, 0x015C, 5, 0x0000, 0, 0), }; #endif /* __ASM_ARCH_MX6_MX6SL_PINS_H__ */ diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index ffcb1a4..f45f335 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -21,6 +21,11 @@ #include <common.h> #include <fsl_esdhc.h> #include <mmc.h> +#include <netdev.h> +#if CONFIG_I2C_MXC +#include <i2c.h> +#include <asm/imx-common/mxc_i2c.h> +#endif DECLARE_GLOBAL_DATA_PTR; @@ -36,6 +41,28 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#if CONFIG_I2C_MXC +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +/* I2C1 for PMIC */ +struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC, + .gp = IMX_GPIO_NR(3, 13), + }, + .sda = { + .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC, + .gp = IMX_GPIO_NR(3, 12), + }, +}; +#endif + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -134,6 +161,28 @@ static int setup_fec(void) } #endif +#ifdef CONFIG_I2C_MXC +static int setup_pmic_voltages(void) +{ + unsigned char value, rev_id = 0; + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (!i2c_probe(0x8)) { + if (i2c_read(0x8, 0, 1, &value, 1)) { + printf("Read device ID error!\n"); + return -1; + } + if (i2c_read(0x8, 3, 1, &rev_id, 1)) { + printf("Read Rev ID error!\n"); + return -1; + } + printf("Found PFUZE100! deviceid=%x,revid=%x\n", value, rev_id); + } + + return 0; +} +#endif + int board_early_init_f(void) { setup_iomux_uart(); @@ -152,6 +201,21 @@ int board_init(void) return 0; } +int board_late_init(void) +{ + int ret = 0; + +#ifdef CONFIG_I2C_MXC + setup_i2c(0, CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE, &i2c_pad_info0); + ret = setup_pmic_voltages(); + if (ret) + return -1; +#endif + + return 0; +} + u32 get_board_rev(void) { return get_cpu_rev(); |