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authorRobin Gong <b38343@freescale.com>2013-08-27 14:22:30 +0800
committerRobin Gong <b38343@freescale.com>2013-09-02 10:22:27 +0800
commit7bb604fa058b253045002458d20c8e75655af91b (patch)
treeb986843dd836bdf4e38212753a385799c91e5cd0
parent40f717dc3c704a6104c399afd7f7b44a4a2d532b (diff)
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ENGR00276023-1: ARM: imx: add ldo bypass and 1.2G check
Add ldo bypass and 1.2G check in soc.c. Extend arch_preboot_os to support read ldo-bypass from fdt. Signed-off-by: Robin Gong <b38343@freescale.com>
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c45
-rw-r--r--arch/arm/imx-common/cpu.c7
-rw-r--r--arch/arm/include/asm/arch-mx6/sys_proto.h6
3 files changed, 56 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index c803b5c..26279bf 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -34,6 +34,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/boot_mode.h>
#include <asm/imx-common/dma.h>
+#include <libfdt.h>
#include <stdbool.h>
struct scu_regs {
@@ -446,6 +447,50 @@ void s_init(void)
{
}
+#ifdef CONFIG_LDO_BYPASS_CHECK
+DECLARE_GLOBAL_DATA_PTR;
+int check_ldo_bypass(void)
+{
+ int ret = 0;
+ int node;
+ /* Get the node from FDT for anatop ldo-bypass */
+ node = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
+ "fsl,imx6q-gpc");
+ if (node < 0) {
+ printf("gpc: No node for gpc in device tree,%d\n", node);
+ return ret;
+ }
+ ret = fdt_getprop(gd->fdt_blob, node, "fsl,ldo-bypass", NULL);
+ return ret;
+}
+
+int check_1_2G(void)
+{
+ u32 reg;
+ int result = 0;
+ struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
+ struct fuse_bank *bank = &iim->bank[0];
+ struct fuse_bank0_regs *fuse_bank0 =
+ (struct fuse_bank0_regs *)bank->fuse_regs;
+
+ reg = readl(&fuse_bank0->cfg4);
+ if (reg & (0x3 << 16))
+ result = 1;
+
+ return result;
+}
+
+void set_anatop_bypass(void)
+{
+ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+ u32 reg = readl(&anatop->reg_core);
+
+ /* bypass VDDARM/VDDSOC */
+ reg = reg | (0x1F << 18) | 0x1F;
+ writel(reg, &anatop->reg_core);
+}
+#endif
+
#ifndef CONFIG_SYS_L2CACHE_OFF
void v7_outer_cache_enable(void)
{
diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c
index a410b72..f1e8e26 100644
--- a/arch/arm/imx-common/cpu.c
+++ b/arch/arm/imx-common/cpu.c
@@ -192,10 +192,13 @@ u32 get_ahb_clk(void)
return get_periph_clk() / (ahb_podf + 1);
}
-#if defined(CONFIG_VIDEO_IPUV3)
void arch_preboot_os(void)
{
+#if defined(CONFIG_LDO_BYPASS_CHECK)
+ ldo_mode_set(check_ldo_bypass());
+#endif
+#if defined(CONFIG_VIDEO_IPUV3)
/* disable video before launching O/S */
ipuv3_fb_shutdown();
-}
#endif
+}
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index d1b1bc9..135169f 100644
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -39,6 +39,12 @@ const char *get_imx_type(u32 imxtype);
unsigned imx_ddr_size(void);
void set_vddsoc(u32 mv);
+#ifdef CONFIG_LDO_BYPASS_CHECK
+int check_ldo_bypass(void);
+int check_1_2G(void);
+void set_anatop_bypass(void);
+void ldo_mode_set(int ldo_bypass);
+#endif
/*
* Initializes on-chip ethernet controllers.