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author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-03-12 12:10:28 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-03-28 14:16:12 +0900 |
commit | 566933278101c144d75361ea682678a326c1290d (patch) | |
tree | 111cee2ea1aa4de049b4c2f50e95c7188fe86f24 | |
parent | 3313e0e26224fc9a0c445124f3455058c696df84 (diff) | |
download | u-boot-imx-566933278101c144d75361ea682678a326c1290d.zip u-boot-imx-566933278101c144d75361ea682678a326c1290d.tar.gz u-boot-imx-566933278101c144d75361ea682678a326c1290d.tar.bz2 |
sh: Add support SuperH SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
-rw-r--r-- | drivers/serial/serial_sh.c | 1 | ||||
-rw-r--r-- | include/asm-sh/cpu_sh4.h | 11 | ||||
-rw-r--r-- | include/asm-sh/cpu_sh7750.h | 4 |
3 files changed, 9 insertions, 7 deletions
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index 8ee58a0..7088c93 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -55,6 +55,7 @@ # define LSR_ORER 1 # define FIFOLEVEL_MASK 0xFF #elif defined(CONFIG_CPU_SH7750) || \ + defined(CONFIG_CPU_SH7751) || \ defined(CONFIG_CPU_SH7722) # define SCSPTR (vu_short *)(SCIF_BASE + 0x20) # define SCLSR (vu_short *)(SCIF_BASE + 0x24) diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index 4d9e300..c200ba5 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -30,14 +30,15 @@ #define CACHE_OC_NUM_ENTRIES 512 #define CACHE_OC_ENTRY_SHIFT 5 -#if defined (CONFIG_CPU_SH7750) -#include <asm/cpu_sh7750.h> +#if defined (CONFIG_CPU_SH7750) || \ + defined(CONFIG_CPU_SH7751) +# include <asm/cpu_sh7750.h> #elif defined (CONFIG_CPU_SH7722) -#include <asm/cpu_sh7722.h> +# include <asm/cpu_sh7722.h> #elif defined (CONFIG_CPU_SH7780) -#include <asm/cpu_sh7780.h> +# include <asm/cpu_sh7780.h> #else -#error "Unknown SH4 variant" +# error "Unknown SH4 variant" #endif #endif /* _ASM_CPU_SH4_H_ */ diff --git a/include/asm-sh/cpu_sh7750.h b/include/asm-sh/cpu_sh7750.h index bb6461a..3c3c309 100644 --- a/include/asm-sh/cpu_sh7750.h +++ b/include/asm-sh/cpu_sh7750.h @@ -25,10 +25,10 @@ #ifdef CONFIG_CPU_TYPE_R #define CACHE_OC_NUM_WAYS 2 -#define CCR_CACHE_INIT 0x8000090d /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */ +#define CCR_CACHE_INIT 0x8000090D /* EMODE,ICI,ICE(16k),OCI,P1-wb,OCE(32k) */ #else #define CACHE_OC_NUM_WAYS 1 -#define CCR_CACHE_INIT 0x0000090b +#define CCR_CACHE_INIT 0x0000090B #endif /* OCN */ |