diff options
author | Ye.Li <B37916@freescale.com> | 2014-01-14 13:47:47 +0800 |
---|---|---|
committer | Ye.Li <B37916@freescale.com> | 2014-01-17 11:28:07 +0800 |
commit | ea211a104343ec386b5b78c1e213552af35349ca (patch) | |
tree | 550c2686fd44db71d83a8ee258d4732e84f924c5 | |
parent | 712f9f6ae901f03115b27ad7a4c000276334591a (diff) | |
download | u-boot-imx-ea211a104343ec386b5b78c1e213552af35349ca.zip u-boot-imx-ea211a104343ec386b5b78c1e213552af35349ca.tar.gz u-boot-imx-ea211a104343ec386b5b78c1e213552af35349ca.tar.bz2 |
ENGR00294905 ARM:imx6:sabreauto Add USB HOST BSP support
Sabreauto board has pin conflict (pin EIM_D18) between NOR flash
and i2c3. To enable the USB host, the i2c3 must be used to operate
the max7310 IO expander to output the VBUS power.
As SPINOR is enabled at default, it is impossible to use USB host
at same time. Thus, remove the SYS_USE_SPINOR from sabreauto
configurations to disable SPINOR.
Signed-off-by: Ye.Li <B37916@freescale.com>
-rw-r--r-- | board/freescale/mx6qsabreauto/mx6qsabreauto.c | 120 | ||||
-rw-r--r-- | boards.cfg | 12 | ||||
-rw-r--r-- | include/configs/mx6qsabreauto.h | 27 |
3 files changed, 144 insertions, 15 deletions
diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index cb627d7..de59829 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2012-2014 Freescale Semiconductor, Inc. * * Author: Fabio Estevam <fabio.estevam@freescale.com> * Author: Jason Liu <r64343@freescale.com> @@ -49,6 +49,10 @@ #endif #endif /*CONFIG_FASTBOOT*/ +#ifdef CONFIG_MAX7310_IOEXP +#include <gpio_exp.h> +#endif + DECLARE_GLOBAL_DATA_PTR; #define I2C_EXP_RST IMX_GPIO_NR(1, 15) @@ -100,8 +104,30 @@ struct i2c_pads_info i2c_pad_info1 = { .gp = IMX_GPIO_NR(4, 13) } }; + +struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_3__GPIO_1_3 | PC, + .gp = IMX_GPIO_NR(1, 3) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D18__GPIO_3_18 | PC, + .gp = IMX_GPIO_NR(3, 18) + } +}; + +iomux_v3_cfg_t const i2c_info2_steer_pads[] = { + /* Steer logic */ + MX6_PAD_EIM_A24__GPIO_5_4 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; #endif +iomux_v3_cfg_t const ioexp_max7310_reset_pads[] = { + MX6_PAD_SD2_DAT0__GPIO_1_15 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + int dram_init(void) { gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); @@ -446,6 +472,39 @@ int setup_sata(void) } #endif +#ifdef CONFIG_MAX7310_IOEXP +void reset_max7310(void) +{ + imx_iomux_v3_setup_multiple_pads(ioexp_max7310_reset_pads, + ARRAY_SIZE(ioexp_max7310_reset_pads)); + gpio_direction_output(I2C_EXP_RST, 1); +} + +int setup_max7310(void) +{ +#ifdef CONFIG_I2C_MXC + /* set steering config to i2c, + * note: this causes pin conflicts with eimnor and spinor + */ + imx_iomux_v3_setup_multiple_pads(i2c_info2_steer_pads, + ARRAY_SIZE(i2c_info2_steer_pads)); + gpio_direction_output(IMX_GPIO_NR(5, 4), 1); + + /*setup i2c info 2*/ + setup_i2c(2, CONFIG_SYS_I2C_SPEED, + CONFIG_SYS_I2C_SLAVE + 1, &i2c_pad_info2); + + gpio_exp_setup_port(1, 1, 0x30); + gpio_exp_setup_port(2, 1, 0x32); + gpio_exp_setup_port(3, 1, 0x34); + + return 0; +#else + return -EPERM; +#endif +} +#endif + int mx6_rgmii_rework(struct phy_device *phydev) { unsigned short val; @@ -726,6 +785,11 @@ int board_early_init_f(void) { setup_iomux_uart(); +#ifdef CONFIG_MAX7310_IOEXP + /*Reset gpio expander at early stage*/ + reset_max7310(); +#endif + #if defined(CONFIG_VIDEO_IPUV3) setup_display(); #endif @@ -779,6 +843,10 @@ int board_late_init(void) return -1; #endif +#ifdef CONFIG_MAX7310_IOEXP + setup_max7310(); +#endif + return 0; } @@ -924,3 +992,53 @@ void udc_pins_setting(void) } #endif /*CONFIG_IMX_UDC*/ + +#ifdef CONFIG_USB_EHCI_MX6 +#define USB_HOST1_PWR IOEXP_GPIO_NR(2, 7) +#define USB_OTG_PWR IOEXP_GPIO_NR(3, 1) + +iomux_v3_cfg_t const usb_otg_pads[] = { + MX6_PAD_ENET_RX_ER__ANATOP_USBOTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_ehci_hcd_init(int port) +{ + switch (port) { + case 0: + imx_iomux_v3_setup_multiple_pads(usb_otg_pads, + ARRAY_SIZE(usb_otg_pads)); + + /*set daisy chain for otg_pin_id on 6q. for 6dl, this bit is reserved*/ + mxc_iomux_set_gpr_register(1, 13, 1, 0); + break; + case 1: + break; + default: + printf("MXC USB port %d not yet supported\n", port); + return 1; + } + return 0; +} + +int board_ehci_power(int port, int on) +{ + switch (port) { + case 0: + if (on) + gpio_exp_direction_output(USB_OTG_PWR, 1); + else + gpio_exp_direction_output(USB_OTG_PWR, 0); + break; + case 1: + if (on) + gpio_exp_direction_output(USB_HOST1_PWR, 1); + else + gpio_exp_direction_output(USB_HOST1_PWR, 0); + break; + default: + printf("MXC USB port %d not yet supported\n", port); + return 1; + } + return 0; +} +#endif @@ -256,22 +256,22 @@ mx53smd arm armv7 mx53smd freesca ima3-mx53 arm armv7 ima3-mx53 esg mx5 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg mx6dlarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL -mx6dlsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR +mx6dlsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048 mx6dlsabreauto_spinor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SPINOR mx6dlsabreauto_eimnor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_EIMNOR mx6dlsabreauto_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_NAND -mx6dlsabreautoandroid arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR,ANDROID_SUPPORT +mx6dlsabreautoandroid arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,ANDROID_SUPPORT mx6dlsabreautoandroid_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_NAND,ANDROID_SUPPORT mx6dlsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/mx6qsabresd/mx6dl_4x_mt41j128.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR mx6dlsabresdandroid arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/mx6qsabresd/mx6dl_4x_mt41j128.cfg,MX6DL,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR,ANDROID_SUPPORT mx6qsabresd_mfg arm armv7 mx6qsabresd freescale mx6 mx6qsabresd_mfg:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR mx6qarm2 arm armv7 mx6qarm2 freescale mx6 mx6qarm2:IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q -mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR +mx6qsabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048 mx6qsabreauto_spinor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SPINOR mx6qsabreauto_eimnor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_EIMNOR mx6qsabreauto_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_NAND mx6qsabreauto_sata arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_SATA -mx6qsabreautoandroid arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_USE_SPINOR,ANDROID_SUPPORT +mx6qsabreautoandroid arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,ANDROID_SUPPORT mx6qsabreautoandroid_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6q.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabreauto.dtb",DDR_MB=2048,SYS_BOOT_NAND,ANDROID_SUPPORT mx6qsabrelite arm armv7 mx6qsabrelite freescale mx6 mx6qsabrelite:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg mx6qsabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR @@ -279,11 +279,11 @@ mx6qsabresd_sata arm armv7 mx6qsabresd freesca mx6qsabresdandroid arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg,MX6Q,DEFAULT_FDT_FILE="imx6q-sabresd.dtb",DDR_MB=1024,SYS_USE_SPINOR,ANDROID_SUPPORT mx6solosabresd arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/mx6qsabresd/mx6solo_4x_mt41j128.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=512,SYS_USE_SPINOR,SYS_NOSMP="nosmp" mx6solosabresdandroid arm armv7 mx6qsabresd freescale mx6 mx6qsabresd:IMX_CONFIG=board/freescale/mx6qsabresd/mx6solo_4x_mt41j128.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=512,SYS_USE_SPINOR,SYS_NOSMP="nosmp",ANDROID_SUPPORT -mx6solosabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_USE_SPINOR,SYS_NOSMP="nosmp" +mx6solosabreauto arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_NOSMP="nosmp" mx6solosabreauto_spinor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_BOOT_SPINOR,SYS_NOSMP="nosmp" mx6solosabreauto_eimnor arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_BOOT_EIMNOR,SYS_NOSMP="nosmp" mx6solosabreauto_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_BOOT_NAND,SYS_NOSMP="nosmp" -mx6solosabreautoandroid arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_USE_SPINOR,SYS_NOSMP="nosmp",ANDROID_SUPPORT +mx6solosabreautoandroid arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_NOSMP="nosmp",ANDROID_SUPPORT mx6solosabreautoandroid_nand arm armv7 mx6qsabreauto freescale mx6 mx6qsabreauto:IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabreauto.dtb",DDR_MB=1024,SYS_BOOT_NAND,SYS_NOSMP="nosmp",ANDROID_SUPPORT mx6slevk arm armv7 mx6slevk freescale mx6 mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL mx6slevkandroid arm armv7 mx6slevk freescale mx6 mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,ANDROID_SUPPORT diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index b56f93e..3a078af 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2012-2014 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX6Q SabreAuto board. * @@ -17,22 +17,33 @@ #define CONFIG_CONSOLE_DEV "ttymxc3" #define CONFIG_MMCROOT "/dev/mmcblk0p2" +#define CONFIG_SYS_USE_NAND + +#include "mx6qsabre_common.h" +#include <asm/imx-common/gpio.h> + +/*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */ +#if !defined(CONFIG_SYS_USE_SPINOR) && !defined(CONFIG_SYS_USE_EIMNOR) /* USB Configs */ #define CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 #define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ -#define CONFIG_SYS_USE_NAND +/* Enable multiple I2C bus support*/ +#define CONFIG_I2C_MULTI_BUS -#include "mx6qsabre_common.h" -#include <asm/imx-common/gpio.h> +/* MAX7310 configs*/ +#define CONFIG_MAX7310_IOEXP +#define CONFIG_IOEXP_DEVICES_NUM 3 +#define CONFIG_IOEXP_DEV_PINS_NUM 8 +#endif #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_MMC_ENV_DEV 0 |