ENGR00308084 iMX6SX:SABRESD Support M4 fast boot at early stage

Support M4 boot in 50 ms, kick start M4 at "board_early_init_f" stage
where u-boot passes ARM and architecture initialization.

Add a configuration "CONFIG_SYS_AUXCORE_FASTUP" for this feature
enablement. And a build config "mx6sxsabresd_m4fastup".
Adjust the default M4 image address to 0x78000000 represented by
"CONFIG_SYS_AUXCORE_BOOTDATA".

When M4 fast boot is enabled, RDC must be enabled together and
the QSPI driver must turn off. Because M4 is running on QSPI flash
in XIP. Setup this relationship by configurations.

Signed-off-by: Ye.Li <B37916@freescale.com>

6 files changed, 26 insertions, 10 deletions

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 1a9e667..90f469c 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -495,9 +495,6 @@ int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
 	stack = *(u32 *)boot_private_data;
 	pc = *(u32 *)(boot_private_data + 4);
 
-	printf("## Stack at 0x%08x\n", stack);
-	printf("## PC at 0x%08x\n", pc);
-
 	/* Set the stack and pc to M4 bootROM */
 	writel(stack, M4_BOOTROM_BASE_ADDR);
 	writel(pc, M4_BOOTROM_BASE_ADDR + 4);
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index e9fd2fa..1259beb 100644
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -55,6 +55,10 @@ void set_anatop_bypass(void);
 void ldo_mode_set(int ldo_bypass);
 #endif
 
+#ifdef CONFIG_MX6SX
+int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data);
+#endif
+
 /*
  * Initializes on-chip ethernet controllers.
  * to override, implement board_eth_init()
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 3a6c8d6..7bf303d 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -267,7 +267,7 @@ static struct fsl_esdhc_cfg usdhc_cfg[3] = {
 int mmc_get_env_devno(void)
 {
 	u32 soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
-	u32 dev_no;
+	int dev_no;
 
 	/* BOOT_CFG2[3] and BOOT_CFG2[4] */
 	dev_no = (soc_sbmr & 0x00001800) >> 11;
@@ -278,6 +278,9 @@ int mmc_get_env_devno(void)
 
 	dev_no--;
 
+	if (dev_no < 0)
+		dev_no = CONFIG_SYS_MMC_ENV_DEV;
+
 	return dev_no;
 }
 
@@ -661,6 +664,10 @@ int board_early_init_f(void)
 	imx_rdc_setup_peripherals(shared_resources, ARRAY_SIZE(shared_resources));
 #endif
 
+#ifdef CONFIG_SYS_AUXCORE_FASTUP
+	arch_auxiliary_core_up(0, CONFIG_SYS_AUXCORE_BOOTDATA);
+#endif
+
 	setup_iomux_uart();
 	return 0;
 }
diff --git a/boards.cfg b/boards.cfg
index 6fc01d2..0bccd93 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -301,6 +301,7 @@ mx6sx_19x19_lpddr2_arm2_qspi2        arm         armv7       mx6sx_19x19_arm2
 mx6sxsabresd                 arm         armv7       mx6sxsabresd        freescale      mx6		mx6sxsabresd:IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX
 mx6sxsabresdandroid      arm         armv7       mx6sxsabresd        freescale      mx6		mx6sxsabresd:IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX,ANDROID_SUPPORT
 mx6sxsabresd_qspi2           arm         armv7       mx6sxsabresd        freescale      mx6		mx6sxsabresd:IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX,SYS_BOOT_QSPI
+mx6sxsabresd_m4fastup     arm         armv7       mx6sxsabresd        freescale      mx6		mx6sxsabresd:IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,MX6SX,SYS_BOOT_QSPI,SYS_AUXCORE_FASTUP
 eco5pk                       arm         armv7       eco5pk              8dtech         omap3
 nitrogen6dl                  arm         armv7       nitrogen6x          boundary       mx6		nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024
 nitrogen6dl2g                arm         armv7       nitrogen6x          boundary       mx6		nitrogen6x:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048
diff --git a/include/configs/mx6sx_arm2.h b/include/configs/mx6sx_arm2.h
index 734bd5e..09b3eb3 100755
--- a/include/configs/mx6sx_arm2.h
+++ b/include/configs/mx6sx_arm2.h
@@ -128,6 +128,7 @@
 #define CONFIG_LOADADDR			0x80800000
 #define CONFIG_SYS_TEXT_BASE		0x87800000
 
+#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
 #define CONFIG_CMD_BOOTAUX /* Boot M4 */
 #define CONFIG_CMD_SETEXPR
 
@@ -145,7 +146,7 @@
 				"sf write ${loadaddr} 0x0 ${filesize}; " \
 			"fi; " \
 		"fi\0" \
-	"m4boot=sf probe; bootaux 0x70000000\0"
+	"m4boot=sf probe; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
 #else
 #define UPDATE_M4_ENV ""
 #endif
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index d15d06c..ab67694 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -134,8 +134,11 @@
 #define CONFIG_LOADADDR			0x80800000
 #define CONFIG_SYS_TEXT_BASE		0x87800000
 
-#define CONFIG_CMD_BOOTAUX /* Boot M4 */
+#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
+#ifndef CONFIG_SYS_AUXCORE_FASTUP
+#define CONFIG_CMD_BOOTAUX /* Boot M4 by command, disable this when M4 fast up */
 #define CONFIG_CMD_SETEXPR
+#endif
 
 #ifdef CONFIG_CMD_BOOTAUX
 #define UPDATE_M4_ENV \
@@ -151,7 +154,7 @@
 				"sf write ${loadaddr} 0x0 ${filesize}; " \
 			"fi; " \
 		"fi\0" \
-	"m4boot=sf probe; bootaux 0x70000000\0"
+	"m4boot=sf probe; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
 #else
 #define UPDATE_M4_ENV ""
 #endif
@@ -283,11 +286,14 @@
 
 #define CONFIG_ENV_SIZE			SZ_8K
 
-#define CONFIG_SYS_USE_QSPI   /* Enable the QSPI flash at default */
-
-#ifdef CONFIG_SYS_BOOT_QSPI
+#ifdef CONFIG_SYS_AUXCORE_FASTUP
+#define CONFIG_MXC_RDC
+#define CONFIG_ENV_IS_IN_MMC  /* Must disable QSPI driver, because M4 run on QSPI */
+#elif defined CONFIG_SYS_BOOT_QSPI
+#define CONFIG_SYS_USE_QSPI
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 #else
+#define CONFIG_SYS_USE_QSPI   /* Enable the QSPI flash at default */
 #define CONFIG_ENV_IS_IN_MMC
 #endif