diff options
| author | Ye.Li <B37916@freescale.com> | 2014-04-08 17:47:37 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-04-10 13:19:57 +0800 |
| commit | 05101c07bc272d8c1506e89fa2841f7a4f7e36a6 (patch) | |
| tree | edcfb3bd8d166a831b3f8a2af6139340f40c106a | |
| parent | 6988e35d080900dd6861995cf96710271178c466 (diff) | |
| download | u-boot-imx-05101c07bc272d8c1506e89fa2841f7a4f7e36a6.zip u-boot-imx-05101c07bc272d8c1506e89fa2841f7a4f7e36a6.tar.gz u-boot-imx-05101c07bc272d8c1506e89fa2841f7a4f7e36a6.tar.bz2 | |
ENGR00307803 iMX6SX: Remove PFD reset to support boot with BT_FREQ=1
The PFD reset in U-boot is used to work around a ROM issue existing on
old imx6 TO.This will cause the DDR access failed when BT_FREQ=1
because the PLL2 PFD0 is for MMDC clock.
Since MX6SX does not have such issue, remove the work around to support
boot with BT_FREQ=1.
Signed-off-by: Ye.Li <B37916@freescale.com>
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 3608655..1a9e667 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -406,7 +406,9 @@ int arch_cpu_init(void) imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ +#ifndef CONFIG_MX6SX /* Reset pfd is not needed for MX6SX */ imx_reset_pfd(); +#endif imx_set_pcie_phy_power_down(); imx_set_vddpu_power_down(); |