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author | Stefan Roese <sr@denx.de> | 2007-08-18 14:33:02 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2007-08-18 14:33:02 +0200 |
commit | 8280f6a1c43247616b68224675188e5ccd124650 (patch) | |
tree | 1bfd0f89a9fd5c69e5b717bb7746068dd426e495 | |
parent | 4a442d3186b31893b4f77c6e82f63c4517a5224b (diff) | |
download | u-boot-imx-8280f6a1c43247616b68224675188e5ccd124650.zip u-boot-imx-8280f6a1c43247616b68224675188e5ccd124650.tar.gz u-boot-imx-8280f6a1c43247616b68224675188e5ccd124650.tar.bz2 |
Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r-- | CREDITS | 56 | ||||
-rw-r--r-- | board/freescale/m5249evb/m5249evb.c | 1 | ||||
-rw-r--r-- | board/freescale/m5253evbe/m5253evbe.c | 1 | ||||
-rw-r--r-- | board/freescale/m54455evb/m54455evb.c | 1 | ||||
-rw-r--r-- | cpu/mcf523x/cpu_init.c | 30 | ||||
-rw-r--r-- | cpu/mcf523x/speed.c | 3 | ||||
-rw-r--r-- | cpu/mcf52x2/cpu_init.c | 2 | ||||
-rw-r--r-- | doc/README.m5253evbe | 6 | ||||
-rw-r--r-- | include/configs/M5249EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M5253EVBE.h | 1 | ||||
-rw-r--r-- | lib_m68k/m68k_linux.c | 6 |
11 files changed, 53 insertions, 55 deletions
@@ -147,6 +147,11 @@ N: Daniel Engström E: daniel@omicron.se D: x86 port, Support for sc520_cdp board +N: Hayden Fraser +E: Hayden.Fraser@freescale.com +D: Support for ColdFire MCF5253 +W: www.freescale.com + N: Dr. Wolfgang Grandegger E: wg@denx.de D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards @@ -283,6 +288,11 @@ E: team@leox.org D: Support for LEOX boards, DS164x RTC W: http://www.leox.org +N: TsiChung Liew +E: Tsi-Chung.Liew@freescale.com +D: Support for ColdFire MCF523x, MCF532x, MCF5445x +W: www.freescale.com + N: Leif Lindholm E: leif.lindholm@i3micro.com D: Support for AMD dbau1550 board. @@ -297,6 +307,11 @@ N: Raymond Lo E: lo@routefree.com D: Support for DOS partitions +N: James MacAulay +E: james.macaulay@amirix.com +D: Suppport for Amirix AP1000 +W: www.amirix.com + N: Dan Malek E: dan@embeddedalley.com D: FADSROM, the grandfather of all of this @@ -372,8 +387,9 @@ D: Support for the Wind River sbc405, sbc8240 board W: http://www.windriver.com N: Stefan Roese -E: stefan.roese@esd-electronics.com -D: AMCC PPC401/403/405GP Support; Windows environment support +E: sr@denx.de +D: AMCC PPC4xx Support +W: http://www.denx.de N: Erwin Rol E: erwin@muffin.org @@ -407,6 +423,11 @@ N: Art Shipkowski E: art@videon-central.com D: Support for NetSilicon NS7520 +N: Michal Simek +E: monstr@monstr.eu +D: Support for Microblaze, ML401, XUPV2P board +W: www.monstr.eu + N: Yasushi Shoji E: yashi@atmark-techno.com D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board @@ -420,6 +441,11 @@ E: andrea.scian@dave-tech.it D: Port to B2 board W: www.dave-tech.it +N: Timur Tabi +E: timur@freescale.com +D: Support for MPC8349E-mITX +W: www.freescale.com + N: Rob Taylor E: robt@flyingpig.com D: Port to MBX860T and Sandpoint8240 @@ -473,29 +499,3 @@ N: Alex Zuepke E: azu@sysgo.de D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM W: www.elinos.com - -N: James MacAulay -E: james.macaulay@amirix.com -D: Suppport for Amirix AP1000 -W: www.amirix.com - -N: Timur Tabi -E: timur@freescale.com -D: Support for MPC8349E-mITX -W: www.freescale.com - -N: Michal Simek -E: monstr@monstr.eu -D: Support for Microblaze, ML401, XUPV2P board -W: www.monstr.eu - -N: TsiChung Liew -E: Tsi-Chung.Liew@freescale.com -D: Support for ColdFire MCF523x, MCF532x, MCF5445x -W: www.freescale.com - -N: Hayden Fraser -E: Hayden.Fraser@freescale.com -D: Support for ColdFire MCF5253 -W: www.freescale.com - diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c index b0bf413..e8f621b 100644 --- a/board/freescale/m5249evb/m5249evb.c +++ b/board/freescale/m5249evb/m5249evb.c @@ -111,4 +111,3 @@ int testdram (void) { return (0); } - diff --git a/board/freescale/m5253evbe/m5253evbe.c b/board/freescale/m5253evbe/m5253evbe.c index 67fab5b..43aa84d 100644 --- a/board/freescale/m5253evbe/m5253evbe.c +++ b/board/freescale/m5253evbe/m5253evbe.c @@ -130,4 +130,3 @@ void ide_set_reset(int idereset) } } #endif /* CONFIG_CMD_IDE */ - diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index 1411a1a..6a02782 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -162,4 +162,3 @@ void pci_init_board(void) pci_mcf5445x_init(&hose); } #endif /* CONFIG_PCI */ - diff --git a/cpu/mcf523x/cpu_init.c b/cpu/mcf523x/cpu_init.c index a31054d..55c9cd3 100644 --- a/cpu/mcf523x/cpu_init.c +++ b/cpu/mcf523x/cpu_init.c @@ -127,19 +127,19 @@ int cpu_init_r(void) void uart_port_conf(void) { - volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - /* Setup Ports: */ - switch (CFG_UART_PORT) { - case 0: - gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD); - break; - case 1: - gpio->par_uart = - (GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD); - break; - case 2: - gpio->par_timer = (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD); - break; - } + volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; + + /* Setup Ports: */ + switch (CFG_UART_PORT) { + case 0: + gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD); + break; + case 1: + gpio->par_uart = + (GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD); + break; + case 2: + gpio->par_timer = (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD); + break; + } } diff --git a/cpu/mcf523x/speed.c b/cpu/mcf523x/speed.c index 509109d..247d318 100644 --- a/cpu/mcf523x/speed.c +++ b/cpu/mcf523x/speed.c @@ -41,8 +41,9 @@ int get_clocks(void) pll->syncr = PLL_SYNCR_MFD(1); while (!(pll->synsr & PLL_SYNSR_LOCK)); - + gd->bus_clk = CFG_CLK; gd->cpu_clk = (gd->bus_clk * 2); + return (0); } diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index f41d77b..458b85e 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -63,7 +63,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* * Setup chip selects... diff --git a/doc/README.m5253evbe b/doc/README.m5253evbe index 7f2afcf..0426cb1 100644 --- a/doc/README.m5253evbe +++ b/doc/README.m5253evbe @@ -18,14 +18,14 @@ Created 06/05/2007 SDR: 0x00000000-0x00ffffff SRAM0: 0x20010000-0x20017fff SRAM1: 0x20000000-0x2000ffff - MBAR1: 0x10000000-0x4fffffff + MBAR1: 0x10000000-0x4fffffff MBAR2: 0x80000000-0xCfffffff - Flash: 0xffe00000-0xffffffff + Flash: 0xffe00000-0xffffffff 3. DEFINITIONS AND COMPILATION ============================== 3.1 Explanation on NEW definitions in include/configs/M5253EVBE.h - CONFIG_MCF52x2 Processor family + CONFIG_MCF52x2 Processor family CONFIG_MCF5253 MCF5253 specific CONFIG_M5253EVBE Amadeus Plus board specific CFG_CLK Define Amadeus Plus CPU Clock diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index b300b68..de7ea42 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -192,4 +192,3 @@ #define CFG_GPIO1_LED 0x00400000 /* user led */ #endif /* M5249 */ - diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 9ad74e2..48170e7 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -210,4 +210,3 @@ #define CFG_GPIO1_LED 0x00400000 /* user led */ #endif /* _M5253EVB_H */ - diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c index fde1744..bea9744 100644 --- a/lib_m68k/m68k_linux.c +++ b/lib_m68k/m68k_linux.c @@ -92,7 +92,8 @@ void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, */ asm("movel %%a7, %%d0\n" "movel %%d0, %0\n": "=d"(sp): :"%d0"); -
debug("## Current stack ends at 0x%08lX ", sp); + + debug("## Current stack ends at 0x%08lX ", sp); sp -= 2048; /* just to be sure */ if (sp > CFG_BOOTMAPSZ) @@ -269,7 +270,8 @@ void do_bootm_linux(cmd_tbl_t * cmdtp, int flag, */ asm("movel %%a7, %%d0\n" "movel %%d0, %0\n": "=d"(nsp): :"%d0"); -
nsp -= 2048; /* just to be sure */ + + nsp -= 2048; /* just to be sure */ nsp &= ~0xF; if (nsp > initrd_high) /* limit as specified */ |