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author | Kim Phillips <kim.phillips@freescale.com> | 2008-03-28 10:18:53 -0500 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2008-03-28 14:32:09 -0500 |
commit | 81fd52c6c8fd19f0b7856b98217ce37c46c521af (patch) | |
tree | 935eee35c46a5f8c2904c7cb40592811ecbe340d | |
parent | 35cf155c5ec1ceab2849fa5b6aa3d9a3e9e6f482 (diff) | |
download | u-boot-imx-81fd52c6c8fd19f0b7856b98217ce37c46c521af.zip u-boot-imx-81fd52c6c8fd19f0b7856b98217ce37c46c521af.tar.gz u-boot-imx-81fd52c6c8fd19f0b7856b98217ce37c46c521af.tar.bz2 |
mpc83xx: display ddr frequency in board_add_ram_info banner
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
-rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index c9151d7..97ac7bb 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -34,10 +34,13 @@ #include <asm/mmu.h> #include <spd_sdram.h> +DECLARE_GLOBAL_DATA_PTR; + void board_add_ram_info(int use_default) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile ddr83xx_t *ddr = &immap->ddr; + char buf[32]; printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >> SDRAM_CFG_SDRAM_TYPE_SHIFT) - 1); @@ -48,9 +51,11 @@ void board_add_ram_info(int use_default) puts(", 64-bit"); if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) - puts(", ECC on)"); + puts(", ECC on"); else - puts(", ECC off)"); + puts(", ECC off"); + + printf(", %s MHz)", strmhz(buf, gd->mem_clk)); #if defined(CFG_LB_SDRAM) && defined(CFG_LBC_SDRAM_SIZE) puts("\nSDRAM: "); @@ -60,8 +65,6 @@ void board_add_ram_info(int use_default) #ifdef CONFIG_SPD_EEPROM -DECLARE_GLOBAL_DATA_PTR; - #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) extern void dma_init(void); extern uint dma_check(void); |