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| author | Allen Martin <amartin@nvidia.com> | 2013-01-29 13:51:26 +0000 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2013-02-11 10:35:24 -0700 |
| commit | 23e3158f3450c569f569573cc9462c27c7d8da9e (patch) | |
| tree | 089c3a774c76b218153eed91a4e14ffe69b06e4d | |
| parent | 7d54f022bbf51f7ad7e48937379705e557591557 (diff) | |
| download | u-boot-imx-23e3158f3450c569f569573cc9462c27c7d8da9e.zip u-boot-imx-23e3158f3450c569f569573cc9462c27c7d8da9e.tar.gz u-boot-imx-23e3158f3450c569f569573cc9462c27c7d8da9e.tar.bz2 | |
tegra30: fdt: add SPI SLINK nodes
Add tegra30 SPI SLINK nodes to fdt.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
| -rw-r--r-- | arch/arm/dts/tegra30.dtsi | 72 | ||||
| -rw-r--r-- | board/nvidia/dts/tegra30-cardhu.dts | 5 |
2 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index aa7e7ae..7b8126f 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -90,4 +90,76 @@ /* PERIPH_ID_I2C_DVC, CLK_M */ clocks = <&tegra_car 47>; }; + + spi@7000d400 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d400 0x200>; + interrupts = <0 59 0x04>; + nvidia,dma-request-selector = <&apbdma 15>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC1, PLLP_OUT0 */ + clocks = <&tegra_car 41>; + }; + + spi@7000d600 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d600 0x200>; + interrupts = <0 82 0x04>; + nvidia,dma-request-selector = <&apbdma 16>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC2, PLLP_OUT0 */ + clocks = <&tegra_car 44>; + }; + + spi@7000d800 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000d480 0x200>; + interrupts = <0 83 0x04>; + nvidia,dma-request-selector = <&apbdma 17>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC3, PLLP_OUT0 */ + clocks = <&tegra_car 46>; + }; + + spi@7000da00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000da00 0x200>; + interrupts = <0 93 0x04>; + nvidia,dma-request-selector = <&apbdma 18>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC4, PLLP_OUT0 */ + clocks = <&tegra_car 68>; + }; + + spi@7000dc00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000dc00 0x200>; + interrupts = <0 94 0x04>; + nvidia,dma-request-selector = <&apbdma 27>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC5, PLLP_OUT0 */ + clocks = <&tegra_car 104>; + }; + + spi@7000de00 { + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; + reg = <0x7000de00 0x200>; + interrupts = <0 79 0x04>; + nvidia,dma-request-selector = <&apbdma 28>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + /* PERIPH_ID_SBC6, PLLP_OUT0 */ + clocks = <&tegra_car 105>; + }; }; diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts index 3223ed4..f9f80c5 100644 --- a/board/nvidia/dts/tegra30-cardhu.dts +++ b/board/nvidia/dts/tegra30-cardhu.dts @@ -39,4 +39,9 @@ i2c@7000d000 { clock-frequency = <100000>; }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; }; |