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authorFabio Estevam <fabio.estevam@freescale.com>2013-10-29 15:46:21 -0200
committerLiu Ying <Ying.Liu@freescale.com>2013-11-22 17:29:55 +0800
commit94ef2ddad935c8e9ebe3e092e5c1d6ed12d92d1e (patch)
tree1502374c26fb02ccc350f8d28030de806fa60e56
parent2dda1ff5de06c548b06ecc757a058b4d0ef218ab (diff)
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video: ipu_disp: Fix clock polarity logic
Currently the HDMI splash screen image quality on mx6solo does not show a very stable image. By comparing the IPU driver from U-boot with the one from FSL 4.1.0 BSP, we can see that there is an inverted logic for setting the DI_GEN_POL_CLK bit. >From FSL BSP [1] we have: if (!sig.clk_pol) di_gen |= DI_GEN_POLARITY_DISP_CLK; Applying the same logic into U-boot fixes the HDMI image stability. [1] git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mxc/ipu3/ipu_disp.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de> (cherry picked from commit 2740e5de4f3cd0aa36efcfe1a995fb6e3858cc97) Signed-off-by: Jason Liu <r64343@freescale.com> (cherry picked from commit 1f55273ede94a64f13d806fc4aabb792b1e4110b)
-rw-r--r--drivers/video/ipu_disp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c
index b4116df..58114aa 100644
--- a/drivers/video/ipu_disp.c
+++ b/drivers/video/ipu_disp.c
@@ -1194,7 +1194,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,
if (sig.Vsync_pol)
di_gen |= DI_GEN_POLARITY_3;
- if (sig.clk_pol)
+ if (!sig.clk_pol)
di_gen |= DI_GEN_POL_CLK;
}