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| author | Pierre Aubert <p.aubert@staubli.com> | 2013-09-23 13:37:20 +0200 |
|---|---|---|
| committer | Liu Ying <Ying.Liu@freescale.com> | 2013-11-22 17:29:41 +0800 |
| commit | 2dda1ff5de06c548b06ecc757a058b4d0ef218ab (patch) | |
| tree | 720aac708c7c1590875684cff9743130f4dda8f6 | |
| parent | e949a05c960d86f9bb72c01461d9472b4e42bf8f (diff) | |
| download | u-boot-imx-2dda1ff5de06c548b06ecc757a058b4d0ef218ab.zip u-boot-imx-2dda1ff5de06c548b06ecc757a058b4d0ef218ab.tar.gz u-boot-imx-2dda1ff5de06c548b06ecc757a058b4d0ef218ab.tar.bz2 | |
mx6: Fix use of improper value in enable_ipu_clock
The value MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET that was used to initialize
the CCGR3 register caused an undefined value for CG0.
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
(cherry picked from commit a0a0dacfe8ff8d7036db823ca5ea9ba393a35187)
Signed-off-by: Jason Liu <r64343@freescale.com>
(cherry picked from commit c6fb5f07f5530b0db3157141e14cc056aa3a904f)
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 3c25326..b8f0805 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -492,7 +492,7 @@ void enable_ipu_clock(void) struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; int reg; reg = readl(&mxc_ccm->CCGR3); - reg |= MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET; + reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK; writel(reg, &mxc_ccm->CCGR3); } /***************************************************/ |