ENGR00287268 mx6: fix the secure boot issue on the new tapout chip

The new TO(i.MX6Q TO1.5 and i.MX6DL TO1.2) of ROM change the HAB API
table address, thus the secure boot can't boot up on the new TO.

This patch fix this issue by fix up the HAB API table address according
to the TO revision.

Signed-off-by: Jason Liu <r64343@freescale.com>

3 files changed, 70 insertions, 13 deletions

diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c
index ecb196c..ac7fa6e 100644
--- a/cpu/arm_cortexa8/mx6/generic.c
+++ b/cpu/arm_cortexa8/mx6/generic.c
@@ -1295,13 +1295,50 @@ U_BOOT_CMD(
 
 #ifdef CONFIG_SECURE_BOOT
 /* -------- start of HAB API updates ------------*/
-#define hab_rvt_report_event ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)
-#define hab_rvt_report_status ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)
-#define hab_rvt_authenticate_image \
-	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)
-#define hab_rvt_entry ((hab_rvt_entry_t *) HAB_RVT_ENTRY)
-#define hab_rvt_exit ((hab_rvt_exit_t *) HAB_RVT_EXIT)
-#define hab_rvt_clock_init HAB_RVT_CLOCK_INIT
+#define hab_rvt_report_event_p						\
+(									\
+	(mx6_chip_is_dq() && (mx6_chip_rev() >= CHIP_REV_1_5)) ?	\
+	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :		\
+	(mx6_chip_is_dl() && (mx6_chip_rev() >= CHIP_REV_1_2)) ?	\
+	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :		\
+	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)		\
+)
+
+#define hab_rvt_report_status_p						\
+(									\
+	(mx6_chip_is_dq() && (mx6_chip_rev() >= CHIP_REV_1_5)) ?	\
+	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :	\
+	(mx6_chip_is_dl() && (mx6_chip_rev() >= CHIP_REV_1_2)) ?	\
+	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :	\
+	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)		\
+)
+
+#define hab_rvt_authenticate_image_p					\
+(									\
+	(mx6_chip_is_dq() && (mx6_chip_rev() >= CHIP_REV_1_5)) ?	\
+	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) :\
+	(mx6_chip_is_dl() && (mx6_chip_rev() >= CHIP_REV_1_2)) ?	\
+	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) :\
+	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
+)
+
+#define hab_rvt_entry_p							\
+(									\
+	(mx6_chip_is_dq() && (mx6_chip_rev() >= CHIP_REV_1_5)) ?	\
+	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :			\
+	(mx6_chip_is_dl() && (mx6_chip_rev() >= CHIP_REV_1_2)) ?	\
+	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :			\
+	((hab_rvt_entry_t *)HAB_RVT_ENTRY)				\
+)
+
+#define hab_rvt_exit_p							\
+(									\
+	(mx6_chip_is_dq() && (mx6_chip_rev() >= CHIP_REV_1_5)) ?	\
+	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :				\
+	(mx6_chip_is_dl() && (mx6_chip_rev() >= CHIP_REV_1_2)) ?	\
+	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :				\
+	((hab_rvt_exit_t *)HAB_RVT_EXIT)				\
+)
 
 #define OCOTP_CFG5_OFFSET	0x460
 #define IVT_SIZE		0x20
@@ -1373,6 +1410,11 @@ int get_hab_status(void)
 	size_t bytes = sizeof(event_data); /* Event size in bytes */
 	hab_config_t config = 0;
 	hab_state_t state = 0;
+	hab_rvt_report_event_t *hab_rvt_report_event;
+	hab_rvt_report_status_t *hab_rvt_report_status;
+
+	hab_rvt_report_event = hab_rvt_report_event_p;
+	hab_rvt_report_status = hab_rvt_report_status_p;
 
 	/* Check HAB status */
 	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
@@ -1450,6 +1492,13 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
 	ptrdiff_t ivt_offset = 0;
 	int result = 0;
 	ulong start;
+	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
+	hab_rvt_entry_t *hab_rvt_entry;
+	hab_rvt_exit_t *hab_rvt_exit;
+
+	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
+	hab_rvt_entry = hab_rvt_entry_p;
+	hab_rvt_exit = hab_rvt_exit_p;
 
 	printf("\nAuthenticate uImage from DDR location 0x%lx...\n", ddr_start);
 
diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h
index 9fc1e7a..3992012 100644
--- a/include/asm-arm/arch-mx6/mx6.h
+++ b/include/asm-arm/arch-mx6/mx6.h
@@ -717,6 +717,8 @@
 #define CHIP_TYPE_SOLOLITE	0x60000
 
 #define CHIP_REV_1_0            0x10
+#define CHIP_REV_1_2		0x12
+#define CHIP_REV_1_5		0x15
 #define CHIP_REV_2_0            0x20
 #define CHIP_REV_2_1            0x21
 #define CHIP_REV_MASK           0xff
@@ -749,6 +751,7 @@
 #define mx6_chip_is_dl()	chip_is_type(fsl_system_rev, CHIP_TYPE_DL)
 #define mx6_chip_is_solo()      chip_is_type(fsl_system_rev, CHIP_TYPE_SOLO)
 #define mx6_chip_is_sololite()	chip_is_type(fsl_system_rev, CHIP_TYPE_SOLOLITE)
+#define mx6_chip_rev()		(fsl_system_rev & 0xFF)
 
 #define mx6_chip_dq_name	"i.MX6Q"
 #define mx6_chip_dl_solo_name	"i.MX6DL/Solo"
diff --git a/include/asm-arm/arch-mx6/mx6_secure.h b/include/asm-arm/arch-mx6/mx6_secure.h
index a632ca2..dfad477 100644
--- a/include/asm-arm/arch-mx6/mx6_secure.h
+++ b/include/asm-arm/arch-mx6/mx6_secure.h
@@ -66,12 +66,17 @@ typedef void *hab_rvt_authenticate_image_t(uint8_t, ptrdiff_t, \
 		void **, size_t *, hab_loader_callback_f_t);
 typedef void hapi_clock_init_t(void);
 
-#define HAB_RVT_REPORT_EVENT (*(uint32_t *) 0x000000B4)
-#define HAB_RVT_REPORT_STATUS (*(uint32_t *) 0x000000B8)
-#define HAB_RVT_AUTHENTICATE_IMAGE (*(uint32_t *) 0x000000A4)
-#define HAB_RVT_ENTRY (*(uint32_t *) 0x00000098)
-#define HAB_RVT_EXIT (*(uint32_t *) 0x0000009C)
-#define HAB_RVT_CLOCK_INIT ((hapi_clock_init_t *) 0x0000024D)
+#define HAB_RVT_REPORT_EVENT			(*(uint32_t *) 0x000000B4)
+#define HAB_RVT_REPORT_STATUS			(*(uint32_t *) 0x000000B8)
+#define HAB_RVT_AUTHENTICATE_IMAGE		(*(uint32_t *) 0x000000A4)
+#define HAB_RVT_ENTRY				(*(uint32_t *) 0x00000098)
+#define HAB_RVT_EXIT				(*(uint32_t *) 0x0000009C)
+
+#define HAB_RVT_REPORT_EVENT_NEW		(*(uint32_t *) 0x000000B8)
+#define HAB_RVT_REPORT_STATUS_NEW		(*(uint32_t *) 0x000000BC)
+#define HAB_RVT_AUTHENTICATE_IMAGE_NEW		(*(uint32_t *) 0x000000A8)
+#define HAB_RVT_ENTRY_NEW			(*(uint32_t *) 0x0000009C)
+#define HAB_RVT_EXIT_NEW			(*(uint32_t *) 0x000000A0)
 
 #define HAB_CID_ROM 0 /**< ROM Caller ID */
 #define HAB_CID_UBOOT 1 /**< UBOOT Caller ID*/