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| author | John Rigby <jrigby@freescale.com> | 2007-08-24 18:18:43 -0600 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-01-13 23:36:22 +0100 |
| commit | 51b67d06faa670c65de6f29ec5b5aace74b2a047 (patch) | |
| tree | 86be5a7bcb1a1082bdc09348277d5db485343875 | |
| parent | dd531aac34aaad138f16cacdb51d61908d59c0e2 (diff) | |
| download | u-boot-imx-51b67d06faa670c65de6f29ec5b5aace74b2a047.zip u-boot-imx-51b67d06faa670c65de6f29ec5b5aace74b2a047.tar.gz u-boot-imx-51b67d06faa670c65de6f29ec5b5aace74b2a047.tar.bz2 | |
ADS5121: MAX slew rate for PATA pins
Signed-off-by: John Rigby <jrigby@freescale.com>
| -rw-r--r-- | board/ads5121/ads5121.c | 8 | ||||
| -rw-r--r-- | include/mpc512x.h | 9 |
2 files changed, 17 insertions, 0 deletions
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 8531657..b8826a1 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -180,9 +180,17 @@ int checkboard (void) { ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00); uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02); + volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile unsigned long *reg; + int i; printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", brd_rev, cpld_rev); + + /* change the slew rate on all pata pins to max */ + reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]); + for (i = 0; i < 9; i++) + reg[i] |= 0x00000003; return 0; } diff --git a/include/mpc512x.h b/include/mpc512x.h index a100b22..a06b5c6 100644 --- a/include/mpc512x.h +++ b/include/mpc512x.h @@ -345,6 +345,15 @@ /* Indexes in regs array */ #define MEM_IDX 0x00 +#define PATA_CE1_IDX 0x2e +#define PATA_CE2_IDX 0x2f +#define PATA_ISOLATE_IDX 0x30 +#define PATA_IOR_IDX 0x31 +#define PATA_IOW_IDX 0x32 +#define PATA_IOCHRDY_IDX 0x33 +#define PATA_INTRQ_IDX 0x34 +#define PATA_DRQ_IDX 0x35 +#define PATA_DACK_IDX 0x36 #define SPDIF_TXCLOCK_IDX 0x73 #define SPDIF_TX_IDX 0x74 #define SPDIF_RX_IDX 0x75 |