summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMagnus Lilja <lilja.magnus@gmail.com>2008-04-20 10:38:12 +0200
committerWolfgang Denk <wd@denx.de>2008-04-26 00:26:55 +0200
commitf9204e15173834ff8d123e36279ce49c3c6c74fc (patch)
treea42dfcbac65050a6efa297808d54a2971bd12a60
parentf97abbfb47d9e407354e157cae3f6369e460cd37 (diff)
downloadu-boot-imx-f9204e15173834ff8d123e36279ce49c3c6c74fc.zip
u-boot-imx-f9204e15173834ff8d123e36279ce49c3c6c74fc.tar.gz
u-boot-imx-f9204e15173834ff8d123e36279ce49c3c6c74fc.tar.bz2
i.MX31: Enable SPI and MC13783/RTC support for the Litekit board
This patch enables SPI and MC13783/RTC support for the Litekit board. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
-rw-r--r--board/imx31_litekit/imx31_litekit.c12
-rw-r--r--include/configs/imx31_litekit.h8
2 files changed, 20 insertions, 0 deletions
diff --git a/board/imx31_litekit/imx31_litekit.c b/board/imx31_litekit/imx31_litekit.c
index e0fbf25..263dd9f 100644
--- a/board/imx31_litekit/imx31_litekit.c
+++ b/board/imx31_litekit/imx31_litekit.c
@@ -52,6 +52,18 @@ int board_init (void)
mx31_gpio_mux(MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux(MUX_RTS1__UART1_CTS_B);
+ /* SPI2 */
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS2);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SCLK);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SPI_RDY);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MOSI);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_MISO);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS0);
+ mx31_gpio_mux((MUX_CTL_FUNC << 8) | MUX_CTL_CSPI2_SS1);
+
+ /* start SPI2 clock */
+ __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
+
gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
gd->bd->bi_boot_params = (0x80000100); /* adress of boot parameters */
diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 5e97cfa..4281d73 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -63,6 +63,12 @@
#define CONFIG_MX31_UART 1
#define CFG_MX31_UART1 1
+#define CONFIG_HARD_SPI 1
+#define CONFIG_MXC_SPI 1
+#define CONFIG_MXC_SPI_IFACE 1
+
+#define CONFIG_RTC_MC13783 1
+
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
@@ -77,6 +83,8 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
#define CONFIG_BOOTDELAY 3