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| author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-10-25 17:12:36 -0500 |
|---|---|---|
| committer | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-10-25 17:12:36 -0500 |
| commit | c67e12e705b204cfe914e3e3e693d69a445dcabf (patch) | |
| tree | 435ddce37a0dcdaadfd963a1dc053ff7d223927d | |
| parent | 95e9f2c212a65610b2e59a5c00d0113383a4da0b (diff) | |
| download | u-boot-imx-c67e12e705b204cfe914e3e3e693d69a445dcabf.zip u-boot-imx-c67e12e705b204cfe914e3e3e693d69a445dcabf.tar.gz u-boot-imx-c67e12e705b204cfe914e3e3e693d69a445dcabf.tar.bz2 | |
ColdFire 5329: Assign correct SDRAM size and fix cache
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
| -rw-r--r-- | cpu/mcf532x/start.S | 4 | ||||
| -rw-r--r-- | include/configs/M5329EVB.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5cc1c87..61be2ea 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -131,7 +131,7 @@ _start: movec %d0, %VBR move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 + movec %d0, %RAMBAR1 /* invalidate and disable cache */ move.l #0x01000000, %d0 /* Invalidate cache cmd */ @@ -268,7 +268,7 @@ _int_handler: icache_enable: move.l #0x01000000, %d0 /* Invalidate cache cmd */ movec %d0, %CACR /* Invalidate cache */ - move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0 + move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0x80000200, %d0 /* Setup cache mask */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b1605..47d74a3 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CFG_SDRAM_CFG1 0x53722730 #define CFG_SDRAM_CFG2 0x56670000 #define CFG_SDRAM_CTRL 0xE1092000 |