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| author | Heiko Schocher <hs@denx.de> | 2008-08-19 09:57:41 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-08-21 02:02:28 +0200 |
| commit | 8f2b457ef26a44d9e5fd7d6b16c394e5c3a71ca2 (patch) | |
| tree | c708de52297c26fcc6741815beb64785eecf4c8f | |
| parent | 0768b7a872964085eece8d5e9fec9175e9deb161 (diff) | |
| download | u-boot-imx-8f2b457ef26a44d9e5fd7d6b16c394e5c3a71ca2.zip u-boot-imx-8f2b457ef26a44d9e5fd7d6b16c394e5c3a71ca2.tar.gz u-boot-imx-8f2b457ef26a44d9e5fd7d6b16c394e5c3a71ca2.tar.bz2 | |
cfi: rename CFG_FLASH_CFI_DRIVER to CONFIG_FLASH_CFI_DRIVER
Commit 00b1883a4cac59d97cd297b1a3a398db85982865
missed a few boards:
include/configs/M5253DEMO.h
include/configs/ml507.h
include/configs/redwood.h
This patch fixes this.
Signed-off-by: Heiko Schocher <hs@denx.de>
| -rw-r--r-- | include/configs/redwood.h | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/include/configs/redwood.h b/include/configs/redwood.h index 78ca1b3..35e9f8b 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -52,17 +52,17 @@ #define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */ -#define CFG_PCIE_MEMBASE 0x90000000 /* mapped PCIe memory */ -#define CFG_PCIE0_MEMBASE 0x90000000 /* mapped PCIe memory */ -#define CFG_PCIE1_MEMBASE 0xa0000000 /* mapped PCIe memory */ -#define CFG_PCIE_MEMSIZE 0x01000000 - -#define CFG_PCIE0_XCFGBASE 0xb0000000 -#define CFG_PCIE1_XCFGBASE 0xb2000000 -#define CFG_PCIE2_XCFGBASE 0xb4000000 -#define CFG_PCIE0_CFGBASE 0xb6000000 -#define CFG_PCIE1_CFGBASE 0xb8000000 -#define CFG_PCIE2_CFGBASE 0xba000000 +#define CFG_PCIE_MEMBASE 0x90000000 /* mapped PCIe memory */ +#define CFG_PCIE0_MEMBASE 0x90000000 /* mapped PCIe memory */ +#define CFG_PCIE1_MEMBASE 0xa0000000 /* mapped PCIe memory */ +#define CFG_PCIE_MEMSIZE 0x01000000 + +#define CFG_PCIE0_XCFGBASE 0xb0000000 +#define CFG_PCIE1_XCFGBASE 0xb2000000 +#define CFG_PCIE2_XCFGBASE 0xb4000000 +#define CFG_PCIE0_CFGBASE 0xb6000000 +#define CFG_PCIE1_CFGBASE 0xb8000000 +#define CFG_PCIE2_CFGBASE 0xba000000 /* PCIe mapped UTL registers */ #define CFG_PCIE0_REGBASE 0xd0000000 @@ -96,17 +96,17 @@ #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ #define CONFIG_DDR_ECC 1 /* with ECC support */ -#define CFG_SPD_MAX_DIMMS 2 +#define CFG_SPD_MAX_DIMMS 2 /* SPD i2c spd addresses */ #define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR} -#define IIC0_DIMM0_ADDR 0x53 -#define IIC0_DIMM1_ADDR 0x52 +#define IIC0_DIMM0_ADDR 0x53 +#define IIC0_DIMM1_ADDR 0x52 /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CFG_I2C_SPEED 400000 /* I2C speed */ +#define CFG_I2C_SPEED 400000 /* I2C speed */ #define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_ALT_BOOTPROM_ADDR 0x54 @@ -119,7 +119,7 @@ /*----------------------------------------------------------------------- * Environment *----------------------------------------------------------------------*/ -#undef CFG_ENV_IS_IN_NVRAM /* ... not in NVRAM */ +#undef CFG_ENV_IS_IN_NVRAM /* ... not in NVRAM */ #define CFG_ENV_IS_IN_FLASH 1 /* Environment uses flash */ #undef CFG_ENV_IS_IN_EEPROM /* ... not in EEPROM */ @@ -130,13 +130,13 @@ #undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_AMCC_DEF_ENV \ - CONFIG_AMCC_DEF_ENV_POWERPC \ - CONFIG_AMCC_DEF_ENV_NOR_UPD \ - CONFIG_AMCC_DEF_ENV_NAND_UPD \ - "kernel_addr=fc000000\0" \ - "fdt_addr=fc1e0000\0" \ - "ramdisk_addr=fc200000\0" \ + CONFIG_AMCC_DEF_ENV \ + CONFIG_AMCC_DEF_ENV_POWERPC \ + CONFIG_AMCC_DEF_ENV_NOR_UPD \ + CONFIG_AMCC_DEF_ENV_NAND_UPD \ + "kernel_addr=fc000000\0" \ + "fdt_addr=fc1e0000\0" \ + "ramdisk_addr=fc200000\0" \ "" /*----------------------------------------------------------------------------+ @@ -149,7 +149,7 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_IBM_EMAC4_V4 1 -#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ +#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ #define CONFIG_PHY_RESET_DELAY 1000 #define CONFIG_M88E1141_PHY 1 /* Enable phy */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ @@ -164,9 +164,9 @@ /*----------------------------------------------------------------------- * FLASH related *----------------------------------------------------------------------*/ -#define CFG_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CFG_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ #define CFG_MAX_FLASH_BANKS 3 /* number of banks */ #define CFG_MAX_FLASH_SECT 256 /* sectors per device */ |