diff options
author | Mike Frysinger <vapier@gentoo.org> | 2008-10-12 21:41:06 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2009-06-14 20:01:05 -0400 |
commit | 8a9bab08a6fe93e5f3bf57b90438f1d2a67fad3c (patch) | |
tree | 952bb1b0754d98524f15953afa508f99bf3e3352 | |
parent | e82d8a1f028bedb12c4ab88a35a935010d92898c (diff) | |
download | u-boot-imx-8a9bab08a6fe93e5f3bf57b90438f1d2a67fad3c.zip u-boot-imx-8a9bab08a6fe93e5f3bf57b90438f1d2a67fad3c.tar.gz u-boot-imx-8a9bab08a6fe93e5f3bf57b90438f1d2a67fad3c.tar.bz2 |
Blackfin: cm-bf537e: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-rw-r--r-- | MAINTAINERS | 1 | ||||
-rwxr-xr-x | MAKEALL | 1 | ||||
-rw-r--r-- | Makefile | 4 | ||||
-rw-r--r-- | board/cm-bf537e/.gitignore | 1 | ||||
-rw-r--r-- | board/cm-bf537e/Makefile | 57 | ||||
-rw-r--r-- | board/cm-bf537e/cm-bf537e.c | 59 | ||||
-rw-r--r-- | board/cm-bf537e/config.mk | 33 | ||||
-rw-r--r-- | board/cm-bf537e/flash.c | 34 | ||||
-rw-r--r-- | board/cm-bf537e/gpio_cfi_flash.c | 60 | ||||
-rw-r--r-- | board/cm-bf537e/gpio_cfi_flash.h | 10 | ||||
-rw-r--r-- | board/cm-bf537e/u-boot.lds.S | 143 | ||||
-rw-r--r-- | include/configs/cm-bf537e.h | 124 |
12 files changed, 525 insertions, 2 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 5e26022..52b2fd2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -875,6 +875,7 @@ Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> Blackfin Team <u-boot-devel@blackfin.uclinux.org> CM-BF533 BF533 + CM-BF537E BF537 ######################################################################### # End of MAINTAINERS list # @@ -807,6 +807,7 @@ LIST_blackfin=" \ bf548-ezkit \ bf561-ezkit \ cm-bf533 \ + cm-bf537e \ " ######################################################################### @@ -3391,7 +3391,7 @@ BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \ bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit # Bluetechnix tinyboards -BFIN_BOARDS += cm-bf533 +BFIN_BOARDS += cm-bf533 cm-bf537e $(BFIN_BOARDS:%=%_config) : unconfig @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=) @@ -3567,7 +3567,7 @@ clean: $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \ $(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \ $(obj)board/bf5{33,37}-stamp/u-boot.lds \ - $(obj)board/cm-bf533/u-boot.lds \ + $(obj)board/cm-bf5{33,37e}/u-boot.lds \ $(obj)cpu/blackfin/bootrom-asm-offsets.[chs] @rm -f $(obj)include/bmp_logo.h @rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map} diff --git a/board/cm-bf537e/.gitignore b/board/cm-bf537e/.gitignore new file mode 100644 index 0000000..945f324 --- /dev/null +++ b/board/cm-bf537e/.gitignore @@ -0,0 +1 @@ +/u-boot.lds diff --git a/board/cm-bf537e/Makefile b/board/cm-bf537e/Makefile new file mode 100644 index 0000000..f8c270e --- /dev/null +++ b/board/cm-bf537e/Makefile @@ -0,0 +1,57 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o flash.o gpio_cfi_flash.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c new file mode 100644 index 0000000..d1ca0a4 --- /dev/null +++ b/board/cm-bf537e/cm-bf537e.c @@ -0,0 +1,59 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <net.h> +#include <netdev.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include "gpio_cfi_flash.h" + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: Bluetechnix CM-BF537E board\n"); + printf(" Support: http://www.bluetechnix.at/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + gpio_cfi_flash_init(); + + return 0; +} diff --git a/board/cm-bf537e/config.mk b/board/cm-bf537e/config.mk new file mode 100644 index 0000000..c8b9fb8 --- /dev/null +++ b/board/cm-bf537e/config.mk @@ -0,0 +1,33 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/cm-bf537e/flash.c b/board/cm-bf537e/flash.c new file mode 100644 index 0000000..25aeed2 --- /dev/null +++ b/board/cm-bf537e/flash.c @@ -0,0 +1,34 @@ +/* + * flash.c - helper commands for working with GPIO-assisted flash + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <command.h> +#include <asm/blackfin.h> +#include "gpio_cfi_flash.h" + +int do_pf(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong faddr = CONFIG_SYS_FLASH_BASE; + ushort data; + ulong dflg; + + if (argc > 1) { + dflg = simple_strtoul(argv[1], NULL, 16); + faddr |= (dflg << 21); + gpio_cfi_flash_swizzle((void *)faddr); + } else { + data = bfin_read_PORTFIO(); + printf("Port F data %04x (PF4:%i)\n", data, !!(data & PF4)); + } + + return 0; +} + +U_BOOT_CMD(pf, 3, 0, do_pf, + "set/clear PF4 GPIO flash bank switch\n", + "<pf4> - set PF4 GPIO pin state\n"); diff --git a/board/cm-bf537e/gpio_cfi_flash.c b/board/cm-bf537e/gpio_cfi_flash.c new file mode 100644 index 0000000..bb35169 --- /dev/null +++ b/board/cm-bf537e/gpio_cfi_flash.c @@ -0,0 +1,60 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/blackfin.h> +#include <asm/io.h> +#include "gpio_cfi_flash.h" + +#define GPIO_PIN_1 PF4 +#define GPIO_MASK_1 (1 << 21) +#define GPIO_MASK (GPIO_MASK_1) + +void *gpio_cfi_flash_swizzle(void *vaddr) +{ + unsigned long addr = (unsigned long)vaddr; + + if (addr & GPIO_MASK_1) + bfin_write_PORTFIO_SET(GPIO_PIN_1); + else + bfin_write_PORTFIO_CLEAR(GPIO_PIN_1); + +#ifdef GPIO_MASK_2 + if (addr & GPIO_MASK_2) + bfin_write_PORTGIO_SET(GPIO_PIN_2); + else + bfin_write_PORTGIO_CLEAR(GPIO_PIN_2); +#endif + + SSYNC(); + + return (void *)(addr & ~GPIO_MASK); +} + +#define __raw_writeq(value, addr) *(volatile u64 *)addr = value +#define __raw_readq(addr) *(volatile u64 *)addr + +#define MAKE_FLASH(size, sfx) \ +void flash_write##size(u##size value, void *addr) \ +{ \ + __raw_write##sfx(value, gpio_cfi_flash_swizzle(addr)); \ +} \ +u##size flash_read##size(void *addr) \ +{ \ + return __raw_read##sfx(gpio_cfi_flash_swizzle(addr)); \ +} +MAKE_FLASH(8, b) /* flash_write8() flash_read8() */ +MAKE_FLASH(16, w) /* flash_write16() flash_write16() */ +MAKE_FLASH(32, l) /* flash_write32() flash_write32() */ +MAKE_FLASH(64, q) /* flash_write64() flash_write64() */ + +void gpio_cfi_flash_init(void) +{ + bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | GPIO_PIN_1); + gpio_cfi_flash_swizzle((void *)CONFIG_SYS_FLASH_BASE); +} diff --git a/board/cm-bf537e/gpio_cfi_flash.h b/board/cm-bf537e/gpio_cfi_flash.h new file mode 100644 index 0000000..5211e97 --- /dev/null +++ b/board/cm-bf537e/gpio_cfi_flash.h @@ -0,0 +1,10 @@ +/* + * gpio_cfi_flash.c - GPIO-assisted Flash Chip Support + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +void *gpio_cfi_flash_swizzle(void *vaddr); +void gpio_cfi_flash_init(void); diff --git a/board/cm-bf537e/u-boot.lds.S b/board/cm-bf537e/u-boot.lds.S new file mode 100644 index 0000000..8ddfa81 --- /dev/null +++ b/board/cm-bf537e/u-boot.lds.S @@ -0,0 +1,143 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2008 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/blackfin.h> +#undef ALIGN +#undef ENTRY +#undef bfin + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE +# define L1_DATA_B_SRAM_SIZE 0 +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN + l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text : + { + cpu/blackfin/start.o (.text .text.*) + +#ifdef ENV_IS_EMBEDDED + /* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ + + cpu/blackfin/traps.o (.text .text.*) + cpu/blackfin/interrupt.o (.text .text.*) + cpu/blackfin/serial.o (.text .text.*) + common/dlmalloc.o (.text .text.*) + lib_generic/crc32.o (.text .text.*) + + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text .text.*) +#endif + + __initcode_start = .; + cpu/blackfin/initcode.o (.text .text.*) + __initcode_end = .; + + *(.text .text.*) + } >ram + + .rodata : + { + . = ALIGN(4); + *(.rodata .rodata.*) + *(.rodata1) + *(.eh_frame) + . = ALIGN(4); + } >ram + + .data : + { + . = ALIGN(256); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram + __stext_l1_lma = LOADADDR(.text_l1); + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram + __sdata_l1_lma = LOADADDR(.data_l1); + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + __bss_end = .; + } >ram +} diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h new file mode 100644 index 0000000..798e773 --- /dev/null +++ b/include/configs/cm-bf537e.h @@ -0,0 +1,124 @@ +/* + * U-boot - Configuration file for CM-BF537E board + */ + +#ifndef __CONFIG_CM_BF537E_H__ +#define __CONFIG_CM_BF537E_H__ + +#include <asm/blackfin-config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf537-0.2 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 9 +#define CONFIG_MEM_SIZE 32 + +#define CONFIG_EBIU_SDRRC_VAL 0x3f8 +#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd + +#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * Network Settings + */ +#ifndef __ADSPBF534__ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME cm-bf537e +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 32 + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x20000 +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) +#define ENV_IS_EMBEDDED +#else +#define ENV_IS_EMBEDDED_CUSTOM +#endif + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#include <asm/blackfin-config-post.h> + +#endif |