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authorSammy He <r62914@freescale.com>2009-12-21 17:09:24 +0800
committerSammy He <r62914@freescale.com>2009-12-21 17:13:34 +0800
commit750f168825cb80df2c296d69ec671f117d345c02 (patch)
treebceb43c97c84946578912de11d62dfeb52749d74
parente9ff0d26c61f8999a3f48b78538eae0b072ce4c6 (diff)
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ENGR00119526 MX25: Fix mmc read/write failure on mmc ubootrel_imx_2.6.31_09.12.00
Fix MMC read/write failure due to eSDHC register definition wrong Signed-off-by: Sammy He <r62914@freescale.com>
-rw-r--r--drivers/mmc/imx_esdhc.c11
-rw-r--r--include/asm-arm/arch-mx25/mx25-regs.h2
2 files changed, 12 insertions, 1 deletions
diff --git a/drivers/mmc/imx_esdhc.c b/drivers/mmc/imx_esdhc.c
index 5ee0efd..025be87 100644
--- a/drivers/mmc/imx_esdhc.c
+++ b/drivers/mmc/imx_esdhc.c
@@ -315,7 +315,11 @@ void set_sysctl(struct mmc *mmc, uint clock)
clk = (pre_div << 8) | (div << 4);
+#ifdef CONFIG_MX25
+ tmp = readl(&regs->sysctl) | (SYSCTL_HCKEN | SYSCTL_IPGEN);
+#else
tmp = readl(&regs->sysctl) & (~SYSCTL_SDCLKEN);
+#endif
writel(tmp, &regs->sysctl);
tmp = (readl(&regs->sysctl) & (~SYSCTL_CLOCK_MASK)) | clk;
@@ -323,10 +327,15 @@ void set_sysctl(struct mmc *mmc, uint clock)
mdelay(100);
+#ifdef CONFIG_MX25
+ tmp = readl(&regs->sysctl) | SYSCTL_PEREN;
+ writel(tmp, &regs->sysctl);
+#else
while (!(readl(&regs->prsstat) & PRSSTAT_SDSTB)) ;
tmp = readl(&regs->sysctl) | (SYSCTL_SDCLKEN);
writel(tmp, &regs->sysctl);
+#endif
}
static void esdhc_set_ios(struct mmc *mmc)
@@ -380,6 +389,7 @@ static int esdhc_init(struct mmc *mmc)
}
*/
+#ifndef CONFIG_MX25
set_sysctl(mmc, 400000);
tmp = readl(&regs->sysctl) | SYSCTL_INITA;
@@ -387,6 +397,7 @@ static int esdhc_init(struct mmc *mmc)
while (readl(&regs->sysctl) & SYSCTL_INITA)
mdelay(1);
+#endif
return 0;
}
diff --git a/include/asm-arm/arch-mx25/mx25-regs.h b/include/asm-arm/arch-mx25/mx25-regs.h
index 26f3031..77fb4f5 100644
--- a/include/asm-arm/arch-mx25/mx25-regs.h
+++ b/include/asm-arm/arch-mx25/mx25-regs.h
@@ -372,7 +372,7 @@
/*!
* * NFMS bit in RCSR register for pagesize of nandflash
* */
-#define NFMS (*((volatile u32 *)(CCM_BASE+0x18)))
+#define NFMS (*((volatile u32 *)(CCM_BASE+0x28)))
#define NFMS_BIT 8
#define NFMS_NF_DWIDTH 14
#define NFMS_NF_PG_SZ 8