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author | Kim Phillips <kim.phillips@freescale.com> | 2009-02-23 15:42:44 -0600 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2009-02-23 15:42:44 -0600 |
commit | 741a1ea97335c88747a2de6677b92458d6ada00b (patch) | |
tree | 83ee5d31a46d2f1132eb0c968874b765704bd7df | |
parent | 7511835b29f2074ebfa8ea794f0303ec8e49542b (diff) | |
parent | 32688e572ff96715b41420e9a7f280db6c399b65 (diff) | |
download | u-boot-imx-741a1ea97335c88747a2de6677b92458d6ada00b.zip u-boot-imx-741a1ea97335c88747a2de6677b92458d6ada00b.tar.gz u-boot-imx-741a1ea97335c88747a2de6677b92458d6ada00b.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot
86 files changed, 3437 insertions, 470 deletions
@@ -1,3 +1,520 @@ +commit 80b827c2b78329c6503b271e43d9eb693d644710 +Author: Wolfgang Denk <wd@denx.de> +Date: Sun Feb 22 23:45:40 2009 +0100 + + ARM: synchronize mach-types.h with linux v2.6.29-rc5-315-g683fdc5 + + The file was generated from building versatile_defconfig. + + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit 14209ac13ff631e36c9a9dd426c59c2e2f5dab00 +Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> +Date: Sun Feb 22 14:24:11 2009 +0900 + + MIPS: Fix GCC-4.2 'discards qualifiers from pointer target type' warnings + + Compiling dbau1x00 and gth2 boards with GCC-4.2, you would see new warnings + like this: + + skuribay@ubuntu:u-boot.git$ ./MAKEALL dbau1000 + Configuring for dbau1x00 board... + au1x00_eth.c: In function 'au1x00_send': + au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type + au1x00_eth.c: In function 'au1x00_recv': + au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type + au1x00_eth.c: In function 'au1x00_init': + au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type + au1x00_eth.c: In function 'au1x00_recv': + au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type + au1x00_eth.c: In function 'au1x00_init': + au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type + au1x00_eth.c: In function 'au1x00_send': + au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type + + We're passing a volatile pointer to a function which is expecting a non- + volatile pointer. That's potentially dangerous, so gcc warns about it. + Confirmed with ELDK 4.2 (GCC 4.2.2) and Sourcey G++ 4.2 (GCC 4.2.3). + + To fix this, we add a volatile attribute to the argument in question. + The virt_to_phys function in Linux kernel also does the same thing. + + Signed-off-by: Stefan Roese <sr@denx.de> + Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> + +commit aba45c85b22f8c57fc2fedba8e948e06c2e2f5b3 +Author: Dirk Behme <dirk.behme@googlemail.com> +Date: Fri Feb 20 17:51:28 2009 +0100 + + OMAP3: Clean up MMC code + + Clean up OMAP3 MMC code: + + * Convert register access to struct & readx/writex style + * Replace hardcode values by macros + * Remove macro defined twice + + Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> + +commit cfcdf4a9b361d015c0debac73fbf7c511df4a934 +Author: Dirk Behme <dirk.behme@googlemail.com> +Date: Thu Feb 12 18:55:43 2009 +0100 + + OMAP3: Pandora: Update pin mux + + Clock pin must have input enabled for MMC3 to work. + Also enable pull-ups for cmd/data lines to be consistent + with remaining MMC host pin setup. + + Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> + +commit 6530a8bf8a0274b9419141e4c2c5a235cce5380f +Author: Dirk Behme <dirk.behme@googlemail.com> +Date: Thu Feb 12 18:55:42 2009 +0100 + + OMAP3: Add OMAP3 auto detection + + This patch adds OMAP3 cpu type auto detection based on OMAP3 register + and removes hardcoded values. + + Signed-off-by: Steve Sakoman <sakoman@gmail.com> + Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> + +commit f956fd0338f4990793a10f767929ba4963665261 +Author: Dirk Behme <dirk.behme@googlemail.com> +Date: Thu Feb 12 18:55:41 2009 +0100 + + OMAP3: Beagle: Add board revision detection + + With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX) + which might need different software handling. For this, GPIO pin 171 (GPIO + module 6, offset 11) can be used to check for board revision. If this pin + is low, we have a rev C board. Else it must be a revision Ax or Bx board. + + To handle board differences you can call function beagle_get_revision(). + E.g.: + + if (beagle_get_revision()) { + + /* do special revision C stuff here */ + + } + + Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> + +commit 288f3cd912918b97919d13b6f7fb13fbddf74d68 +Author: Dirk Behme <dirk.behme@googlemail.com> +Date: Thu Feb 12 18:55:40 2009 +0100 + + OMAP3: Overo: Clean up pin mux and GPIO configuration + + * Make Overo GPIO114 an input for touchscreen PENDOWN + * Make Overo GPIO144-147 readable + * Make Overo EHCI pinmux match beagle rev c setup + * Adjust pinmux for SMSC911X network chip support + * Remove unnecessary GPIO setup + * Fix merge error in Makefile + + Signed-off-by: Steve Sakoman <sakoman@gmail.com> + Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> + +commit 2579019b8248e5f166e60e37065766efc8a49dbc +Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> +Date: Sun Feb 22 17:08:41 2009 +0100 + + nmdk8815: fix onenand support + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 0176c03a2469676df5bf19cf93a1a6f582f6a120 +Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> +Date: Sun Feb 22 17:56:50 2009 +0100 + + nomadik/nand: fix 'ecc512' discards qualifiers from pointer target type + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 9751a456f702ba2fcdfd1bdbc0138927ef007858 +Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> +Date: Sun Feb 22 17:49:43 2009 +0100 + + davinci: fix implicit declaration of function 'davinci_errata_workarounds' + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 4f5728987f4f9f7845688482aa2b7f2127768165 +Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> +Date: Sun Feb 22 15:49:28 2009 +0100 + + arm: add uart dcc support + + Serial driver via the EmbeddedICE macrocell's DCC channel using + co-processor 14. + + It does include a timeout to ensure that the system does not + totally freeze when there is nothing connected to read. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 0cd18fa982f9a8c1a90ce971379a7d6408976d48 +Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> +Date: Fri Nov 21 14:35:56 2008 -0500 + + ARM DaVinci: Add common peripherals and modules enable functions. + + Taken all the duplicated code for enabling common modules and apply + software workarounds from the board specific code into common + functions. Also added comments explaining the workarounds + (from TI errata documents) and replaced some numerical bit numbers + with more meaningful defines. + + Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> + +commit d3be1bcae7a8207e0a79ffd035d0e90f80378295 +Author: Alessandro Rubini <rubini@unipv.it> +Date: Mon Feb 9 15:53:33 2009 +0100 + + Enable Ethernet for Nomadik 8815 Evaluation Kit + + This trivially enables Ethernet support in the debug board + by setting up the proper chip select. + + Signed-off-by: Alessandro Rubini <rubini@unipv.it> + Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com> + +commit 0d8c6eab2481046e9446264bfe9402bb98ddf433 +Author: Alessandro Rubini <rubini@unipv.it> +Date: Mon Feb 9 15:53:31 2009 +0100 + + Nand driver for Nomadik SoC + + This driver implements the ECC algorithm described in + the CPU data sheet and uses the OOB layout chosen in + already-released development systems (shipped with a custom-made + u-boot 1.3.1). + + Signed-off-by: Alessandro Rubini <rubini@unipv.it> + Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com> + +commit ef339cc2b68e4cbef3f9376a45315e1b974bbd8d +Author: Alessandro Rubini <rubini@unipv.it> +Date: Mon Feb 9 15:53:31 2009 +0100 + + Added nomadik.h header + + Signed-off-by: Alessandro Rubini <rubini@unipv.it> + Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com> + +commit 60ece6d8043d1dd80f5dd32c541213716d624b19 +Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> +Date: Wed Oct 29 20:05:18 2008 +0900 + + r8a66597-hcd: fix cannot use external hub + + Fix the problem that cannot use external hub, because this driver + did not control correctly a DEVADDx register. + + Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> + Signed-off-by: Remy Bohmer <linux@bohmer.net> + +commit e1ffaee728190e76a4596a3579d94e730143585f +Author: Mike Frysinger <vapier@gentoo.org> +Date: Thu Feb 19 01:20:27 2009 -0500 + + Blackfin: disable syscontrol code for now + + Looks like the initcode updates fell out of order during my merges. The + patch that really fixes up this code is part of power-on overhaul and so + is too large for merging at this point. Instead, we can disable the code + as no currently in-tree board depends on it. The next merge window will + fix things up properly. + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit 1b228d68f54832edd867ef98520f760f68192ab7 +Author: Mike Frysinger <vapier@gentoo.org> +Date: Thu Feb 19 01:19:49 2009 -0500 + + Blackfin: bf537-stamp: fix I2C board defines + + The previous merge for cleaning up the I2C driver incorrectly reverted the + CFG_xxx rename for some of the I2C defines. + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + Signed-off-by: Heiko Schocher <hs@denx.de> + +commit 09fee8e8677a6265e89144ccc163bf00e321769e +Author: Wolfgang Denk <wd@denx.de> +Date: Sun Feb 22 01:19:52 2009 +0100 + + Coding Style cleanup; update CHANGELOG + + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit 1dcb50afbb63a439320a985380a0af2dca079d1e +Author: Wolfgang Denk <wd@denx.de> +Date: Sun Feb 22 01:17:47 2009 +0100 + + Makefile: fix cleanup + + Commit e4943ec5 moved the ARM boards to a vendor directory but forgot + to adapt the cleanup rules in the Makefile + + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit edff7bcc4d5540df8b416274652ff02e94c38b9e +Author: Richard Retanubun <RichardRetanubun@RuggedCom.com> +Date: Fri Feb 20 13:01:56 2009 -0500 + + Cleanup the comment for m68k linux boot argument passing. + + This patch clarifies the way m68k passes linux boot argument. + The one gotcha here is that the assembly instruction that + the compiler uses to jump to the kernel is 'jsr' which pushes the + program counter for the instruction after the jsr into the stack pointer. + + Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit 4d41650eec959668280a612467bd95c7b8398513 +Author: Peter Griffin <pgriffin@mpc-data.co.uk> +Date: Tue Feb 10 16:44:45 2009 +0000 + + sh: Fix rsk7203 in tree build + + Signed-off-by: Peter Griffin <pgriffin@mpc-data.co.uk> + +commit fca0cecff73db99d99ad094cca7980472b8a11b5 +Author: Minkyu Kang <mk7.kang@samsung.com> +Date: Wed Feb 18 09:05:52 2009 +0900 + + bootm: Reduce the unnecessary memmove + + Although load address and image start address are same address, + bootm command always does memmove. + That is unnecessary memmove and can be taken few milliseconds + (about 500 msec to 1000 msec). + If skip this memmove, we can reduce the boot time. + + Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> + +commit 670cbde8da83690fed1064c3358f54ae1d693ed2 +Author: Matthias Fuchs <matthias.fuchs@esd.eu> +Date: Sun Feb 15 22:29:15 2009 +0100 + + fpga: Fix Spartan III FPGA booting + + This patch does some minor fixing of the Xilinx Spartan III + FPGA boot code: + + - Fixed call order of post configuration callback and + success message printing (result of copy-paste?) + - remove obsolete comment + - minor coding style cleanup + + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> + +commit 3818b677641038d27b2663fbd6771ad38c932f86 +Author: Matthias Fuchs <matthias.fuchs@esd.eu> +Date: Sun Feb 15 22:28:36 2009 +0100 + + fpga: Fix Spartan II FPGA booting + + This patch does some minor fixing of the Xilinx Spartan II + FPGA boot code: + + - Fixed call order of post configuration callback and + success message printing (result of copy-paste?) + - relocate post configuration callback only when it + is implemented + - remove obsolete comment + - minor coding style cleanup + + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> + +commit b4746d8bf9f4ed6dc8a76c5d52db669604aff84b +Author: Mike Frysinger <vapier@gentoo.org> +Date: Wed Feb 11 20:26:52 2009 -0500 + + drivers/serial/ns16550: move ifdef into Makefile COBJS-$(...) + + Signed-off-by: Mike Frysinger <vapier@gentoo.org> + +commit 6bcb4b806cef8a5dd08fac9a4a672b96d9ee804e +Author: Derek Ou <dou@siconix.com> +Date: Tue Feb 3 16:00:07 2009 -0700 + + lcd_putc bug fix for tab. + + Signed-off-by: Derek Ou <dou@siconix.com> + +commit 35c9e14d8096e519fe76c953a43d52a09617345c +Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com> +Date: Mon Feb 2 09:46:21 2009 +0900 + + MIPS: cpu/mips/Makefile: Add a missing START line + + In the commit 79b51ff8205f0354d5300570614c1d2db499679c ([MIPS] cpu/mips/ + Makefile: Split [CS]OBJS onto separate lines), I wrongly deleted a START + line. This patch puts it back. + + Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> + +commit 9a63b7f4f8f3c99cf017e0d3d4a152dfcd913b5a +Author: Wolfgang Denk <wd@denx.de> +Date: Sat Feb 21 21:51:21 2009 +0100 + + Enable ext2 support for TQM8xxL/M based boards + + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit e3ba7f137c7c454ad626cd0bd2e84d73c7a8644f +Author: Tom Rix <Tom.Rix@windriver.com> +Date: Fri Feb 20 03:47:50 2009 +0100 + + ARM:PXA Use new definitions in mmc.h + + Signed-off-by: Tom Rix <Tom.Rix@windriver.com> + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 682beeac34dc9ab18fab58b26973d2e29d113717 +Author: Andy Fleming <afleming@freescale.com> +Date: Fri Feb 20 03:47:50 2009 +0100 + + Reduce the scope of PXA's mmc_read/mmc_write/mmc_bread functions + + These names are being taken over by the new MMC framework. Hopefuly + the PXA can be easily ported, and these functions will go away entirely. + + Signed-off-by: Andy Fleming <afleming@freescale.com> + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit b03d92e5584935886ff91d5aa0755dc8888b7187 +Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> +Date: Fri Feb 20 03:47:50 2009 +0100 + + pxa: move mmc drivers to drivers/mmc + + introduce new macro CONFIG_PXA_MMC to activate it + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 9490f465642c80c054854689a2ef1a77d65cf1f3 +Author: Tom Rix <Tom.Rix@windriver.com> +Date: Thu Feb 19 19:27:22 2009 -0600 + + ARM:PXA Remove redefinition of mmc_cid and mmc_csd. + + These structures are defined in the common mmc.h + + This was compile checked on cerf250. + +commit 94a3312920b6f9b5da27309549fb73650718c10a +Author: Micha Kalfon <smichak.uv@gmail.com> +Date: Wed Feb 11 19:50:11 2009 +0200 + + pxa: fixing get_timer to return time in miliseconds. + + Fixing the get_timer function to return time in miliseconds instead of + ticks. Also fixed PXA boards to use the conventional value of 1000 for + CONFIG_SYS_HZ. + + Signed-off-by: Micha Kalfon <smichak.uv@gmail.com> + +commit e5e88c3614b79b54719905f66aefb51f9494bc1f +Author: Tom Rix <Tom.Rix@windriver.com> +Date: Thu Feb 19 16:45:43 2009 -0600 + + ARM:OMAP3 Change mmc_init to mmc_legacy_init + + omap3_mmc.c was changed to define mmc_legacy_init. + Remove unused functions. + + Compile tested on all arm + Runtime tested on Zoom1. + + Signed-off-by: Tom Rix <Tom.Rix@windriver.com> + +commit 9e80bb21629988063574f88ca0d28baadff4d963 +Author: Heiko Schocher <hs@denx.de> +Date: Thu Feb 19 17:23:58 2009 +0100 + + 82xx, mgcoge: updates for 2009.03 + + - activate CS4 for accessing the FPGA + - activate Rx buf len > 1 on SMC + - pram activated + - MTDPARTS_DEFAULT defined + - update the size of the flashes in the DTS + before booting Linux + - MONITOR_LEN updated to 384k + - added CONFIG_HOSTNAME + - added CONFIG_ENV_BUFFER_PRINT + - Environment size reduced to 16k + + Signed-off-by: Heiko Schocher <hs@denx.de> + +commit df909554e2401f307925e1bd45d576e4176d9de9 +Author: Heiko Schocher <hs@denx.de> +Date: Thu Feb 19 17:24:01 2009 +0100 + + 8xx, mgsuvd: updates for 2009.03 + + - activate Rx buf len > 1 on SMC + - pram activated + - MTDPARTS_DEFAULT defined + - update the size of the flash in the DTS + before booting Linux + - MONITOR_LEN updated to 384k + - added CONFIG_HOSTNAME + - added CONFIG_ENV_BUFFER_PRINT + - Environment size reduced to 16k + + Signed-off-by: Heiko Schocher <hs@denx.de> + +commit 3511b4e208e12be85b532866f1c660aa2e021557 +Author: Dirk Behme <dirk.behme@googlemail.com> +Date: Wed Feb 18 19:59:39 2009 +0100 + + MMC: Don't use new framework code if not enabled + + Don't use code of new MMC framework in cmd_mmc if CONFIG_GENERIC_MMC + isn't enabled. + + Signed-off-by: Dirk Behme <dirk.behme@googlemail.com> + +commit 32482be67775e00b4cbc49fba62347c1ecc6229c +Author: Wolfgang Denk <wd@denx.de> +Date: Thu Feb 19 13:53:29 2009 +0100 + + TQM8xxL: make some room in low memory for future needs + + THe TQM8xxL use a ahnd-optimized linker script to efficiently use the + small boot sectors in the flash. This patch makes some room in the + first sector to prepare for a size increase of lib_generic/vsprintf.o + by a future patch. + + Signed-off-by: Wolfgang Denk <wd@denx.de> + +commit c157cec3c3f6dfc194532b3a3ca87f85b642962a +Author: Kim Phillips <kim.phillips@freescale.com> +Date: Wed Feb 18 18:06:18 2009 -0600 + + README: remove duplicate entry + + it's been around since the original commit (2ad6b513) that added two + identical entries. + + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> + +commit 1bba30efe1717bea13026e15c7c7d906419fac69 +Author: Wolfgang Denk <wd@denx.de> +Date: Thu Feb 19 00:41:08 2009 +0100 + + Coding style cleanup, update CHANGELOG + + Signed-off-by: Wolfgang Denk <wd@denx.de> + commit 369d0aa9674b65c83f8553b9bcf9d207dc369223 Author: Kim Phillips <kim.phillips@freescale.com> Date: Wed Feb 18 17:43:59 2009 -0600 @@ -63,6 +580,67 @@ Date: Wed Feb 18 21:35:38 2009 +0100 Signed-off-by: Wolfgang Denk <wd@denx.de> +commit b4996d6b2140e5da7f1c346f37a67b19907b307a +Author: Stefan Roese <sr@denx.de> +Date: Wed Feb 18 13:18:00 2009 +0100 + + ppc4xx: PCIe: Change 16GB inbound memory to 4GB + + This patch fixes a problem recently seen on some 4xx platforms. For + example on Kilauea PCIe slot #0. + + Signed-off-by: Stefan Roese <sr@denx.de> + +commit f50fe4bd613c6d35a2c34055f02e9501dd6a9ad5 +Author: Stefan Roese <sr@denx.de> +Date: Wed Feb 18 14:05:37 2009 +0100 + + ppc4xx: Some more PMC405 coding-style cleanup + + Signed-off-by: Stefan Roese <sr@denx.de> + +commit 2f6eb9170bf91b72ea51dcea2a8b9c11b0e20bc5 +Author: Matthias Fuchs <matthias.fuchs@esd.eu> +Date: Sun Feb 15 22:27:47 2009 +0100 + + ppc4xx: Update PMC405 board support + + This patch prepares the good old PMC405 board support for + upcoming PMC405V2 patches. + + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> + Signed-off-by: Stefan Roese <sr@denx.de> + +commit c553b5f4a0c77fc76e1d25e71c8aaa47657e2d6f +Author: Matthias Fuchs <matthias.fuchs@esd.eu> +Date: Sun Feb 15 22:26:54 2009 +0100 + + ppc4xx: Cleanup PMC405 board support + + This patch fixes coding style for PMC405 board support. + Also some unneeded features/code is removed. + + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> + Signed-off-by: Stefan Roese <sr@denx.de> + +commit b4e85d0f37b5b924fbf834867ad6d0b31b86f667 +Author: Ilya Yanok <yanok@emcraft.com> +Date: Thu Feb 5 04:08:20 2009 +0100 + + qong: changes to Dave/DENX Qong configuration + + 1. Changes to the default environment: + - "bootcmd" defined as "run flash_self" + - "saveenv" command removed from "update" + - "uboot" changed to "u-boot" (also in "load") + - "addmtd" variable defined (and added to all boot commands) + 2. CONFIG_CMD_JFFS2 defined to enable "mtdparts" command + 3. MTDIDS_DEFAULT and MTDPARTS_DEFAULT defined + 4. CONFIG_SYS_CBSIZE changed from 256 to 512. That solves the problem + with truncated "bootargs" environment variable. + + Signed-off-by: Ilya Yanok <yanok@emcraft.com> + commit 5f0320108870e5d62983d1d5c13a2a087dddf686 Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Date: Sun Feb 1 17:07:52 2009 +0100 @@ -1099,6 +1677,29 @@ Date: Mon Feb 2 16:34:52 2009 -0600 Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> +commit 0d19f6c8cbe71b9e6d8c6bd6742ed2551e918870 +Author: Ilya Yanok <yanok@emcraft.com> +Date: Tue Feb 10 00:22:31 2009 +0100 + + qong: support for Dave/DENX QongEVB-LITE board + + This patch adds support for Dave/DENX QongEVB-LITE i.MX31-based board. + + Signed-off-by: Ilya Yanok <yanok@emcraft.com> + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + +commit 62cbc408f52fc9a5eb849e0b882c504780c9d183 +Author: Ilya Yanok <yanok@emcraft.com> +Date: Mon Feb 9 18:45:28 2009 +0100 + + dnet: driver for Dave DNET ethernet controller + + Driver for Dave DNET ethernet controller (used on Dave/DENX + QongEVB-LITE board). + + Signed-off-by: Ilya Yanok <yanok@emcraft.com> + Acked-by: Ben Warren <biggerbadderben@gmail.com> + commit 2d43e873a29ca4959ba6a30fc7fb396d3fd0dccf Author: Kumar Gala <galak@kernel.crashing.org> Date: Fri Feb 6 09:49:32 2009 -0600 @@ -1127,6 +1728,16 @@ Date: Fri Feb 6 09:49:31 2009 -0600 Signed-off-by: Kumar Gala <galak@kernel.crashing.org> +commit 54dc517328709c204a9cbf7a253d9f8e6c4b26ec +Author: Ilya Yanok <yanok@emcraft.com> +Date: Sun Feb 8 00:59:43 2009 +0300 + + mx31: add GPIO registers definitions + + Added definitions for i.MX31 processor GPIO registers. + + Signed-off-by: Ilya Yanok <yanok@emcraft.com> + commit 8da601280a8acbc3385784780ed35130e53812f1 Author: Peter Tyser <ptyser@xes-inc.com> Date: Wed Feb 4 13:47:22 2009 -0600 @@ -1167,6 +1778,17 @@ Date: Mon Jan 19 16:32:59 2009 +0200 Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Scott Wood <scottwood@freescale.com> +commit e7deec1bf6fa3b3a21cd8d14fe2a909a42efc9d8 +Author: Nishanth Menon <nm@ti.com> +Date: Mon Feb 2 18:20:12 2009 -0600 + + ARM:OMAP3:Zoom1: Add nand unlock option + + Enable NAND_UNLOCK option for unlocking nand for + erase/write operations + + Signed-off-by: Nishanth Menon <nm@ti.com> + commit 5a9427dc9b8438759db3f67a1e547062f76eb18d Author: derek@siconix.com <derek@siconix.com> Date: Mon Jan 26 14:08:17 2009 -0700 @@ -1178,6 +1800,18 @@ Date: Mon Jan 26 14:08:17 2009 -0700 Signed-off-by: Derek Ou <dou@siconix.com> Signed-off-by: Scott Wood <scottwood@freescale.com> +commit 05fd88776419df59e7f37bac063a209409dd801d +Author: Guennadi Liakhovetski <lg@denx.de> +Date: Fri Feb 6 10:37:45 2009 +0100 + + ARM: remove unused variable + + The "size" variable in start_armboot() in lib_arm/board.c is only really + used in "#ifndef CONFIG_SYS_NO_FLASH" case, and even there it can be + eliminated (thanks to Jean-Christophe PLAGNIOL-VILLARD for a suggestion.) + + Signed-off-by: Guennadi Liakhovetski <lg@denx.de> + commit 6989e4f546d960a407dd5425f800dff9751c8132 Author: Richard Retanubun <RichardRetanubun@RuggedCom.com> Date: Thu Feb 5 09:33:50 2009 -0500 @@ -22,9 +22,9 @@ # VERSION = 2009 -PATCHLEVEL = 01 +PATCHLEVEL = 03 SUBLEVEL = -EXTRAVERSION = +EXTRAVERSION = -rc1 ifneq "$(SUBLEVEL)" "" U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) else @@ -3343,7 +3343,7 @@ mimc200_config : unconfig ######################################################################### rsk7203_config: unconfig @mkdir -p $(obj)include - @echo "#define CONFIG_RSK7203 1" > $(obj)/include/config.h + @echo "#define CONFIG_RSK7203 1" > $(obj)include/config.h @$(MKCONFIG) -a $(@:_config=) sh sh2 rsk7203 renesas ######################################################################### @@ -3457,7 +3457,7 @@ clean: @rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \ $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \ $(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \ - $(obj)board/{integratorap,integratorcp}/u-boot.lds \ + $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \ $(obj)board/{bf533-ezkit,bf533-stamp,bf537-stamp,bf561-ezkit}/u-boot.lds \ $(obj)cpu/blackfin/bootrom-asm-offsets.[chs] @rm -f $(obj)include/bmp_logo.h diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 13b3699..b801150 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -21,7 +21,6 @@ * MA 02111-1307 USA */ - #include <common.h> #include <netdev.h> #include <asm/arch/mx31.h> @@ -165,4 +164,3 @@ int board_eth_init(bd_t *bis) return 0; #endif } - diff --git a/board/davedenx/qong/qong_fpga.h b/board/davedenx/qong/qong_fpga.h index b1cb08a..e8042b1 100644 --- a/board/davedenx/qong/qong_fpga.h +++ b/board/davedenx/qong/qong_fpga.h @@ -38,4 +38,3 @@ #endif #endif /* QONG_FPGA_H */ - diff --git a/board/davinci/common/psc.c b/board/davinci/common/psc.c index d538d51..28e2a4b 100644 --- a/board/davinci/common/psc.c +++ b/board/davinci/common/psc.c @@ -26,6 +26,14 @@ #include <common.h> #include <asm/arch/hardware.h> +#define PINMUX0_EMACEN (1 << 31) +#define PINMUX0_AECS5 (1 << 11) +#define PINMUX0_AECS4 (1 << 10) + +#define PINMUX1_I2C (1 << 7) +#define PINMUX1_UART1 (1 << 1) +#define PINMUX1_UART0 (1 << 0) + /* * The DM6446 includes two separate power domains: "Always On" and "DSP". The * "Always On" power domain is always on when the chip is on. The "Always On" @@ -115,3 +123,60 @@ void dsp_on(void) REG(PSC_GBLCTL) &= ~0x1f; } #endif /* CONFIG_SYS_USE_DSPLINK */ + +void davinci_enable_uart0(void) +{ + lpsc_on(DAVINCI_LPSC_UART0); + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= PINMUX1_UART0; +} + +#ifdef CONFIG_DRIVER_TI_EMAC +void davinci_enable_emac(void) +{ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable EMAC. */ + REG(PINMUX0) |= PINMUX0_EMACEN; +} +#endif + +void davinci_enable_i2c(void) +{ + lpsc_on(DAVINCI_LPSC_I2C); + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= PINMUX1_I2C; +} + +void davinci_errata_workarounds(void) +{ + /* + * Workaround for TMS320DM6446 errata 1.3.22: + * PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset + * Revision(s) Affected: 1.3 and earlier + */ + REG(PSC_SILVER_BULLET) = 0; + + /* + * Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR) + * as suggested in TMS320DM6446 errata 2.1.2: + * + * On DM6446 Silicon Revision 2.1 and earlier, under certain conditions + * low priority modules can occupy the bus and prevent high priority + * modules like the VPSS from getting the required DDR2 throughput. + * A hex value of 0x20 should provide a good ARM (cache enabled) + * performance and still allow good utilization by the VPSS or other + * modules. + */ + REG(VBPR) = 0x20; +} diff --git a/board/davinci/common/psc.h b/board/davinci/common/psc.h index 6ab2575..b2dd7b5 100644 --- a/board/davinci/common/psc.h +++ b/board/davinci/common/psc.h @@ -24,5 +24,9 @@ void lpsc_on(unsigned int id); void dsp_on(void); +void davinci_enable_uart0(void); +void davinci_enable_emac(void); +void davinci_enable_i2c(void); +void davinci_errata_workarounds(void); #endif /* __PSC_H */ diff --git a/board/davinci/dvevm/dvevm.c b/board/davinci/dvevm/dvevm.c index 3fe8858..22308de 100644 --- a/board/davinci/dvevm/dvevm.c +++ b/board/davinci/dvevm/dvevm.c @@ -27,7 +27,6 @@ #include <common.h> #include <i2c.h> #include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> #include "../common/psc.h" #include "../common/misc.h" @@ -41,16 +40,13 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; + /* Configure AEMIF pins (although this should be configured at boot time + * with pull-up/pull-down resistors) */ + REG(PINMUX0) = 0x00000c1f; + + davinci_errata_workarounds(); /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); lpsc_on(DAVINCI_LPSC_GPIO); lpsc_on(DAVINCI_LPSC_USB); @@ -59,24 +55,11 @@ int board_init(void) dsp_on(); #endif /* CONFIG_SYS_USE_DSPLINK */ - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; + davinci_enable_uart0(); + davinci_enable_emac(); + davinci_enable_i2c(); + lpsc_on(DAVINCI_LPSC_TIMER1); timer_init(); return(0); diff --git a/board/davinci/schmoogie/schmoogie.c b/board/davinci/schmoogie/schmoogie.c index 3504a2e..433769a 100644 --- a/board/davinci/schmoogie/schmoogie.c +++ b/board/davinci/schmoogie/schmoogie.c @@ -27,7 +27,6 @@ #include <common.h> #include <i2c.h> #include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> #include "../common/psc.h" #include "../common/misc.h" @@ -41,16 +40,13 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; + /* Configure AEMIF pins (although this should be configured at boot time + * with pull-up/pull-down resistors) */ + REG(PINMUX0) = 0x00000c1f; + + davinci_errata_workarounds(); /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); lpsc_on(DAVINCI_LPSC_GPIO); #if !defined(CONFIG_SYS_USE_DSPLINK) @@ -58,24 +54,11 @@ int board_init(void) dsp_on(); #endif /* CONFIG_SYS_USE_DSPLINK */ - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; + davinci_enable_uart0(); + davinci_enable_emac(); + davinci_enable_i2c(); + lpsc_on(DAVINCI_LPSC_TIMER1); timer_init(); return(0); @@ -87,7 +70,7 @@ int misc_init_r(void) int i = 0; /* Set serial number from UID chip */ - u_int8_t crc_tbl[256] = { + const u_int8_t crc_tbl[256] = { 0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83, 0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41, 0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e, diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c index 9296d7b..e76f86d 100644 --- a/board/davinci/sffsdr/sffsdr.c +++ b/board/davinci/sffsdr/sffsdr.c @@ -30,7 +30,6 @@ #include <common.h> #include <i2c.h> #include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> #include "../common/psc.h" #include "../common/misc.h" @@ -51,16 +50,9 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; + davinci_errata_workarounds(); /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); lpsc_on(DAVINCI_LPSC_GPIO); #if !defined(CONFIG_SYS_USE_DSPLINK) @@ -68,24 +60,11 @@ int board_init(void) dsp_on(); #endif /* CONFIG_SYS_USE_DSPLINK */ - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; + davinci_enable_uart0(); + davinci_enable_emac(); + davinci_enable_i2c(); + lpsc_on(DAVINCI_LPSC_TIMER1); timer_init(); return(0); diff --git a/board/davinci/sonata/sonata.c b/board/davinci/sonata/sonata.c index 6de9356..d56b443 100644 --- a/board/davinci/sonata/sonata.c +++ b/board/davinci/sonata/sonata.c @@ -26,7 +26,6 @@ #include <common.h> #include <asm/arch/hardware.h> -#include <asm/arch/emac_defs.h> #include "../common/psc.h" #include "../common/misc.h" @@ -40,16 +39,13 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - /* Workaround for TMS320DM6446 errata 1.3.22 */ - REG(PSC_SILVER_BULLET) = 0; + /* Configure AEMIF pins (although this should be configured at boot time + * with pull-up/pull-down resistors) */ + REG(PINMUX0) = 0x00000c1f; + + davinci_errata_workarounds(); /* Power on required peripherals */ - lpsc_on(DAVINCI_LPSC_EMAC); - lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); - lpsc_on(DAVINCI_LPSC_MDIO); - lpsc_on(DAVINCI_LPSC_I2C); - lpsc_on(DAVINCI_LPSC_UART0); - lpsc_on(DAVINCI_LPSC_TIMER1); lpsc_on(DAVINCI_LPSC_GPIO); #if !defined(CONFIG_SYS_USE_DSPLINK) @@ -57,24 +53,11 @@ int board_init(void) dsp_on(); #endif /* CONFIG_SYS_USE_DSPLINK */ - /* Bringup UART0 out of reset */ - REG(UART0_PWREMU_MGMT) = 0x0000e003; - - /* Enable GIO3.3V cells used for EMAC */ - REG(VDD3P3V_PWDN) = 0; - - /* Enable UART0 MUX lines */ - REG(PINMUX1) |= 1; - - /* Enable EMAC and AEMIF pins */ - REG(PINMUX0) = 0x80000c1f; - - /* Enable I2C pin Mux */ - REG(PINMUX1) |= (1 << 7); - - /* Set the Bus Priority Register to appropriate value */ - REG(VBPR) = 0x20; + davinci_enable_uart0(); + davinci_enable_emac(); + davinci_enable_i2c(); + lpsc_on(DAVINCI_LPSC_TIMER1); timer_init(); return(0); diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c index 5c50739..0e3aa49 100644 --- a/board/keymile/mgcoge/mgcoge.c +++ b/board/keymile/mgcoge/mgcoge.c @@ -325,6 +325,7 @@ void ft_blob_update (void *blob, bd_t *bd) { ulong memory_data[2] = {0}; ulong flash_data[8] = {0}; + flash_info_t *info; memory_data[0] = cpu_to_be32 (bd->bi_memstart); memory_data[1] = cpu_to_be32 (bd->bi_memsize); @@ -332,12 +333,14 @@ void ft_blob_update (void *blob, bd_t *bd) sizeof (memory_data)); /* update Flash addr, size */ + info = flash_get_info(CONFIG_SYS_FLASH_BASE); flash_data[2] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE); - flash_data[3] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE); + flash_data[3] = cpu_to_be32 (info->size); flash_data[4] = cpu_to_be32 (5); flash_data[5] = cpu_to_be32 (0); + info = flash_get_info(CONFIG_SYS_FLASH_BASE_1); flash_data[6] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE_1); - flash_data[7] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE_1); + flash_data[7] = cpu_to_be32 (info->size); fdt_set_node_and_value (blob, "/localbus", "ranges", flash_data, sizeof (flash_data)); /* MAC addr */ diff --git a/board/keymile/mgsuvd/mgsuvd.c b/board/keymile/mgsuvd/mgsuvd.c index 02baf62..e7bfa31 100644 --- a/board/keymile/mgsuvd/mgsuvd.c +++ b/board/keymile/mgsuvd/mgsuvd.c @@ -168,6 +168,7 @@ void ft_blob_update (void *blob, bd_t *bd) ulong brg_data[1] = {0}; ulong memory_data[2] = {0}; ulong flash_data[4] = {0}; + ulong flash_reg[3] = {0}; memory_data[0] = cpu_to_be32 (bd->bi_memstart); memory_data[1] = cpu_to_be32 (bd->bi_memsize); @@ -179,6 +180,10 @@ void ft_blob_update (void *blob, bd_t *bd) fdt_set_node_and_value (blob, "/localbus", "ranges", flash_data, sizeof (flash_data)); + flash_reg[2] = cpu_to_be32 (bd->bi_flashsize); + fdt_set_node_and_value (blob, "/localbus/flash@0,0", "reg", flash_reg, + sizeof (flash_reg)); + /* BRG */ brg_data[0] = cpu_to_be32 (bd->bi_busfreq); fdt_set_node_and_value (blob, "/soc/cpm", "brg-frequency", brg_data, diff --git a/board/omap3/beagle/beagle.c b/board/omap3/beagle/beagle.c index ecdea09..7377058 100644 --- a/board/omap3/beagle/beagle.c +++ b/board/omap3/beagle/beagle.c @@ -36,6 +36,8 @@ #include <asm/mach-types.h> #include "beagle.h" +static int beagle_revision_c; + /****************************************************************************** * Routine: board_init * Description: Early hardware init. @@ -54,6 +56,43 @@ int board_init(void) } /****************************************************************************** + * Routine: beagle_get_revision + * Description: Return revision of the BeagleBoard this code is running on. + * If it is a revision Ax/Bx board, this function returns 0, + * on a revision C board you will get a 1. + *****************************************************************************/ +int beagle_get_revision(void) +{ + return beagle_revision_c; +} + +/****************************************************************************** + * Routine: beagle_identify + * Description: Detect if we are running on a Beagle revision Ax/Bx or + * Cx. This can be done by GPIO_171. If this is low, we are + * running on a revision C board. + *****************************************************************************/ +void beagle_identify(void) +{ + gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; + + /* Configure GPIO 171 as input */ + writel(readl(&gpio6_base->oe) | GPIO11, &gpio6_base->oe); + + /* Get value of GPIO 171 */ + beagle_revision_c = readl(&gpio6_base->datain) & BOARD_REVISION_MASK; + + printf("Board revision "); + if (beagle_revision_c) { + printf("Ax/Bx\n"); + beagle_revision_c = 0; + } else { + printf("C\n"); + beagle_revision_c = 1; + } +} + +/****************************************************************************** * Routine: misc_init_r * Description: Configure board specific parts *****************************************************************************/ @@ -75,6 +114,8 @@ int misc_init_r(void) writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); + beagle_identify(); + return 0; } diff --git a/board/omap3/beagle/beagle.h b/board/omap3/beagle/beagle.h index 6511ffa..d66f159 100644 --- a/board/omap3/beagle/beagle.h +++ b/board/omap3/beagle/beagle.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3530", "OMAP3 Beagle board", #if defined(CONFIG_ENV_IS_IN_ONENAND) "OneNAND", @@ -36,6 +35,8 @@ const omap3_sysinfo sysinfo = { #endif }; +#define BOARD_REVISION_MASK (0x1 << 11) + /* * IEN - Input Enable * IDIS - Input Disable diff --git a/board/omap3/evm/evm.h b/board/omap3/evm/evm.h index 4ecea7f..199824f 100644 --- a/board/omap3/evm/evm.h +++ b/board/omap3/evm/evm.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { OMAP3EVM_V1, OMAP3EVM_V2, DDR_DISCRETE, - "35X-Family", "OMAP3 EVM board", #if defined(CONFIG_ENV_IS_IN_ONENAND) "OneNAND", diff --git a/board/omap3/overo/Makefile b/board/omap3/overo/Makefile index c165629..dd673ca 100644 --- a/board/omap3/overo/Makefile +++ b/board/omap3/overo/Makefile @@ -44,4 +44,5 @@ distclean: clean # defines $(obj).depend target include $(SRCTREE)/rules.mk +######################################################################### sinclude $(obj).depend diff --git a/board/omap3/overo/overo.c b/board/omap3/overo/overo.c index 7964123..48375ad 100644 --- a/board/omap3/overo/overo.c +++ b/board/omap3/overo/overo.c @@ -58,21 +58,8 @@ int board_init(void) *****************************************************************************/ int misc_init_r(void) { - gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE; - gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE; - power_init_r(); - /* Configure GPIOs to output */ - writel(~((GPIO10) | GPIO9 | GPIO3 | GPIO2), &gpio6_base->oe); - writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | - GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); - - /* Set GPIOs */ - writel(GPIO10 | GPIO9 | GPIO3 | GPIO2, &gpio6_base->setdataout); - writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | - GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); - return 0; } diff --git a/board/omap3/overo/overo.h b/board/omap3/overo/overo.h index 3c1b6bc..71de3f1 100644 --- a/board/omap3/overo/overo.h +++ b/board/omap3/overo/overo.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3503", "Gumstix Overo board", #if defined(CONFIG_ENV_IS_IN_ONENAND) "OneNAND", @@ -130,7 +129,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) /*GPMC_nWP*/\ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) /*GPMC_WAIT0*/\ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /*GPMC_WAIT1*/\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\ + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | DIS | M4)) /*GPIO_64*/\ + /* - SMSC911X_NRES*/\ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /*GPMC_nCS3*/\ /*DSS*/\ MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\ @@ -184,7 +184,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) /*CAM_STROBE*/\ MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) /*CSI2_DX0*/\ MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) /*CSI2_DY0*/\ - MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) /*CSI2_DX1*/\ + MUX_VAL(CP(CSI2_DX1), (IEN | PTD | EN | M4)) /*GPIO_114*/\ MUX_VAL(CP(CSI2_DY1), (IEN | PTU | EN | M4)) /*GPIO_115*/\ /*Audio Interface */\ MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) /*McBSP2_FSX*/\ @@ -218,10 +218,10 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCBSP3_DR), (IDIS | PTD | DIS | M1)) /*UART2_RTS*/\ MUX_VAL(CP(MCBSP3_CLKX), (IDIS | PTD | DIS | M1)) /*UART2_TX*/\ MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M1)) /*UART2_RX*/\ - MUX_VAL(CP(UART2_CTS), (IDIS | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\ - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145*/\ - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M4)) /*GPIO_146*/\ - MUX_VAL(CP(UART2_RX), (IDIS | PTD | DIS | M4)) /*GPIO_147*/\ + MUX_VAL(CP(UART2_CTS), (IEN | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\ + MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/\ + MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/\ + MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M4)) /*GPIO_147*/\ MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) /*UART1_TX*/\ MUX_VAL(CP(UART1_RTS), (IEN | PTU | DIS | M4)) /*GPIO_149*/ \ MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\ @@ -271,7 +271,8 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) /*McSPI1_SOMI */\ MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) /*McSPI1_CS0*/\ MUX_VAL(CP(MCSPI1_CS1), (IDIS | PTD | EN | M0)) /*McSPI1_CS1*/\ - MUX_VAL(CP(MCSPI1_CS2), (IDIS | PTD | DIS | M4)) /*GPIO_176*/\ + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176*/\ + /* - SMSC911X_IRQ*/\ MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA2*/\ MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA7*/\ MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA4*/\ @@ -306,7 +307,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT6*/\ MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT5*/\ MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | EN | M3)) /*HSUSB2_STP*/\ + MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DIR*/\ MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_NXT*/\ MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA0*/\ diff --git a/board/omap3/pandora/pandora.h b/board/omap3/pandora/pandora.h index 8525a03..dd09f12 100644 --- a/board/omap3/pandora/pandora.h +++ b/board/omap3/pandora/pandora.h @@ -27,7 +27,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3530", "OMAP3 Pandora", "NAND", }; @@ -200,12 +199,12 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*MMC2_CLKIN*/\ MUX_VAL(CP(MMC1_DAT5), (IEN | PTD | DIS | M4)) /*GPIO_127 - MMC2_WP*/\ /*SDIO Interface to WIFI Module*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M2)) /*MMC3_CLK*/\ - MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CMD*/\ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT0*/\ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT1*/\ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT2*/\ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | DIS | M2)) /*MMC3_DAT3*/\ + MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTD | DIS | M2)) /*MMC3_CLK*/\ + MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\ + MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\ + MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\ + MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\ + MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\ /*Audio Interface To Bluetooth chip*/\ MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) /*McBSP3_DX*/\ MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) /*McBSP3_DR*/\ diff --git a/board/omap3/zoom1/zoom1.h b/board/omap3/zoom1/zoom1.h index d389492..bc8fba8 100644 --- a/board/omap3/zoom1/zoom1.h +++ b/board/omap3/zoom1/zoom1.h @@ -31,7 +31,6 @@ const omap3_sysinfo sysinfo = { SDP_3430_V1, SDP_3430_V2, DDR_STACKED, - "3430", "OMAP3 Zoom MDK Rev 1", "NAND", }; diff --git a/board/st/nmdk8815/nmdk8815.c b/board/st/nmdk8815/nmdk8815.c index c54eac1..edf4626 100644 --- a/board/st/nmdk8815/nmdk8815.c +++ b/board/st/nmdk8815/nmdk8815.c @@ -49,8 +49,11 @@ int board_init(void) writel(0x00000000, NOMADIK_GPIO1_BASE + 0x28); writel(readl(NOMADIK_SRC_BASE) | 0x8000, NOMADIK_SRC_BASE); - icache_enable(); + /* Set up SMCS1 for Ethernet: sram-like, enabled, timing values */ + writel(0x0000305b, REG_FSMC_BCR1); + writel(0x00033f33, REG_FSMC_BTR1); + icache_enable(); return 0; } diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 07f6c6b..6fdeef4 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -340,8 +340,10 @@ static int bootm_load_os(image_info_t os, ulong *load_end, int boot_progress) } else { printf (" Loading %s ... ", type_name); - memmove_wd ((void *)load, - (void *)image_start, image_len, CHUNKSZ); + if (load != image_start) { + memmove_wd ((void *)load, + (void *)image_start, image_len, CHUNKSZ); + } } *load_end = load + image_len; puts("OK\n"); diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 73ec7bf..16c919b 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -40,7 +40,7 @@ U_BOOT_CMD( "init mmc card", NULL ); -#endif /* !CONFIG_GENERIC_MMC */ +#else /* !CONFIG_GENERIC_MMC */ static void print_mmcinfo(struct mmc *mmc) { @@ -171,3 +171,4 @@ U_BOOT_CMD( "mmc write <device num> addr blk# cnt\n" "mmc rescan <device num>\n" "mmc list - lists available devices\n"); +#endif diff --git a/common/devices.c b/common/devices.c index 38f1bbc..ba53c9b 100644 --- a/common/devices.c +++ b/common/devices.c @@ -215,6 +215,9 @@ int devices_init (void) /* Initialize the list */ INIT_LIST_HEAD(&(devs.list)); +#ifdef CONFIG_ARM_DCC_MULTI + drv_arm_dcc_init (); +#endif #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif diff --git a/common/lcd.c b/common/lcd.c index 5f73247..2bcdba2 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -187,7 +187,7 @@ void lcd_putc (const char c) return; case '\t': /* Tab (8 chars alignment) */ - console_col |= 8; + console_col += 8; console_col &= ~7; if (console_col >= CONSOLE_COLS) { diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index ab012b6..28a1020 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -37,6 +37,14 @@ static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE; static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE; /****************************************** + * get_cpu_type(void) - extract cpu info + ******************************************/ +u32 get_cpu_type(void) +{ + return readl(&ctrl_base->ctrl_omap_stat); +} + +/****************************************** * get_cpu_rev(void) - extract version info ******************************************/ u32 get_cpu_rev(void) @@ -156,7 +164,25 @@ u32 get_board_rev(void) *********************************************************************/ void display_board_info(u32 btype) { - char *mem_s, *sec_s; + char *cpu_s, *mem_s, *sec_s; + + switch (get_cpu_type()) { + case OMAP3503: + cpu_s = "3503"; + break; + case OMAP3515: + cpu_s = "3515"; + break; + case OMAP3525: + cpu_s = "3525"; + break; + case OMAP3530: + cpu_s = "3530"; + break; + default: + cpu_s = "35XX"; + break; + } if (is_mem_sdr()) mem_s = "mSDR"; @@ -180,7 +206,8 @@ void display_board_info(u32 btype) sec_s = "?"; } - printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", sysinfo.cpu_string, + + printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s, sec_s, get_cpu_rev()); printf("%s + %s/%s\n", sysinfo.board_string, mem_s, sysinfo.nand_string); diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c index ae0016d..3f3b479 100644 --- a/cpu/blackfin/initcode.c +++ b/cpu/blackfin/initcode.c @@ -264,6 +264,7 @@ void initcode(ADI_BOOT_DATA *bootstruct) * the memory controller. Older bootroms lacks such helpers * so we do it ourselves. */ +#define BOOTROM_CAPS_SYSCONTROL 0 if (BOOTROM_CAPS_SYSCONTROL) { serial_putc('S'); diff --git a/cpu/mips/Makefile b/cpu/mips/Makefile index 5091781..28a1cbb 100644 --- a/cpu/mips/Makefile +++ b/cpu/mips/Makefile @@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a +START = start.o SOBJS-y = cache.o COBJS-y = cpu.o interrupts.o diff --git a/cpu/pxa/Makefile b/cpu/pxa/Makefile index 8b4367e..42903b2 100644 --- a/cpu/pxa/Makefile +++ b/cpu/pxa/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a START = start.o -COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o mmc.o usb.o +COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o usb.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/interrupts.c index ec8fb9e..40d8bf2 100644 --- a/cpu/pxa/interrupts.c +++ b/cpu/pxa/interrupts.c @@ -33,6 +33,14 @@ #error: interrupts not implemented yet #endif +#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS) +#define TIMER_FREQ_HZ 3250000 +#elif defined(CONFIG_PXA250) +#define TIMER_FREQ_HZ 3686400 +#else +#error "Timer frequency unknown - please config PXA CPU type" +#endif + int interrupt_init (void) { /* nothing happens here - we don't setup any IRQs */ @@ -67,7 +75,10 @@ void reset_timer_masked (void) ulong get_timer_masked (void) { - return OSCR; + unsigned long long ticks = get_ticks(); + + return (((ticks / TIMER_FREQ_HZ) * 1000) + + ((ticks % TIMER_FREQ_HZ) * 1000) / TIMER_FREQ_HZ); } void udelay_masked (unsigned long usec) @@ -78,17 +89,17 @@ void udelay_masked (unsigned long usec) if (usec >= 1000) { tmo = usec / 1000; - tmo *= CONFIG_SYS_HZ; + tmo *= TIMER_FREQ_HZ; tmo /= 1000; } else { - tmo = usec * CONFIG_SYS_HZ; + tmo = usec * TIMER_FREQ_HZ; tmo /= (1000*1000); } - endtime = get_timer_masked () + tmo; + endtime = get_ticks() + tmo; do { - ulong now = get_timer_masked (); + ulong now = get_ticks(); diff = endtime - now; } while (diff >= 0); } @@ -99,7 +110,7 @@ void udelay_masked (unsigned long usec) */ unsigned long long get_ticks(void) { - return get_timer(0); + return OSCR; } /* @@ -109,6 +120,6 @@ unsigned long long get_ticks(void) ulong get_tbclk (void) { ulong tbclk; - tbclk = CONFIG_SYS_HZ; + tbclk = TIMER_FREQ_HZ; return tbclk; } diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index f5ba7fc..d745334 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -260,8 +260,6 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) ts = get_timer (0); /* get current time */ ret_val = FPGA_SUCCESS; while ((*fn->done) (cookie) == FPGA_FAIL) { - /* XXX - we should have a check in here somewhere to - * make sure we aren't busy forever... */ CONFIG_FPGA_DELAY (); (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */ @@ -276,23 +274,18 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) } } - if (ret_val == FPGA_SUCCESS) { -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - puts ("Done.\n"); -#endif - } /* * Run the post configuration function if there is one. */ - if (*fn->post) { + if (*fn->post) (*fn->post) (cookie); - } - else { #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK + if (ret_val == FPGA_SUCCESS) + puts ("Done.\n"); + else puts ("Fail.\n"); #endif - } } else { printf ("%s: NULL Interface function table!\n", __FUNCTION__); @@ -412,8 +405,10 @@ static int Spartan2_sp_reloc (Xilinx_desc * desc, ulong reloc_offset) addr = (ulong) (fn->abort) + reloc_offset; fn_r->abort = (Xilinx_abort_fn) addr; - addr = (ulong) (fn->post) + reloc_offset; - fn_r->post = (Xilinx_post_fn) addr; + if (fn->post) { + addr = (ulong) (fn->post) + reloc_offset; + fn_r->post = (Xilinx_post_fn) addr; + } fn_r->relocated = TRUE; @@ -541,8 +536,6 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->wr) (TRUE, TRUE, cookie); while (! (*fn->done) (cookie)) { - /* XXX - we should have a check in here somewhere to - * make sure we aren't busy forever... */ CONFIG_FPGA_DELAY (); (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */ @@ -562,17 +555,14 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) /* * Run the post configuration function if there is one. */ - if (*fn->post) { + if (*fn->post) (*fn->post) (cookie); - } #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - if (ret_val == FPGA_SUCCESS) { + if (ret_val == FPGA_SUCCESS) puts ("Done.\n"); - } - else { + else puts ("Fail.\n"); - } #endif } else { diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index 9ce41f1..8bb2449 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -281,23 +281,18 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize) } } - if (ret_val == FPGA_SUCCESS) { -#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - puts ("Done.\n"); -#endif - } /* * Run the post configuration function if there is one. */ - if (*fn->post) { + if (*fn->post) (*fn->post) (cookie); - } - else { #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK + if (ret_val == FPGA_SUCCESS) + puts ("Done.\n"); + else puts ("Fail.\n"); #endif - } } else { printf ("%s: NULL Interface function table!\n", __FUNCTION__); @@ -567,17 +562,14 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) /* * Run the post configuration function if there is one. */ - if (*fn->post) { + if (*fn->post) (*fn->post) (cookie); - } #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK - if (ret_val == FPGA_SUCCESS) { + if (ret_val == FPGA_SUCCESS) puts ("Done.\n"); - } - else { + else puts ("Fail.\n"); - } #endif } else { diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 6aa24f5..1b0af12 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -30,6 +30,7 @@ COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o COBJS-$(CONFIG_BFIN_SDH) += bfin_sdh.o COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o COBJS-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index 0148702..e90db7e 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -28,6 +28,8 @@ #include <mmc.h> #include <part.h> #include <i2c.h> +#include <asm/io.h> +#include <asm/arch/mmc.h> const unsigned short mmc_transspeed_val[15][4] = { {CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)}, @@ -49,6 +51,7 @@ const unsigned short mmc_transspeed_val[15][4] = { mmc_card_data cur_card_data; static block_dev_desc_t mmc_blk_dev; +static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE; block_dev_desc_t *mmc_get_dev(int dev) { @@ -59,55 +62,49 @@ void twl4030_mmc_config(void) { unsigned char data; - data = 0x20; - i2c_write(0x4B, 0x82, 1, &data, 1); - data = 0x2; - i2c_write(0x4B, 0x85, 1, &data, 1); + data = DEV_GRP_P1; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); + data = VMMC1_VSEL_30; + i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); } unsigned char mmc_board_init(void) { - unsigned int value = 0; + t2_t *t2_base = (t2_t *)T2_BASE; twl4030_mmc_config(); - value = CONTROL_PBIAS_LITE; - CONTROL_PBIAS_LITE = value | (1 << 2) | (1 << 1) | (1 << 9); + writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | + PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, + &t2_base->pbias_lite); - value = CONTROL_DEV_CONF0; - CONTROL_DEV_CONF0 = value | (1 << 24); + writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, + &t2_base->devconf0); return 1; } void mmc_init_stream(void) { - volatile unsigned int mmc_stat; + writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con); - OMAP_HSMMC_CON |= INIT_INITSTREAM; + writel(MMC_CMD0, &mmc_base->cmd); + while (!(readl(&mmc_base->stat) & CC_MASK)); - OMAP_HSMMC_CMD = MMC_CMD0; - do { - mmc_stat = OMAP_HSMMC_STAT; - } while (!(mmc_stat & CC_MASK)); - - OMAP_HSMMC_STAT = CC_MASK; + writel(CC_MASK, &mmc_base->stat); - OMAP_HSMMC_CMD = MMC_CMD0; - do { - mmc_stat = OMAP_HSMMC_STAT; - } while (!(mmc_stat & CC_MASK)); + writel(MMC_CMD0, &mmc_base->cmd); + while (!(readl(&mmc_base->stat) & CC_MASK)); - OMAP_HSMMC_STAT = OMAP_HSMMC_STAT; - OMAP_HSMMC_CON &= ~INIT_INITSTREAM; + writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con); } unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div) { unsigned int val; - mmc_reg_out(OMAP_HSMMC_SYSCTL, (ICE_MASK | DTO_MASK | CEN_MASK), - (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); + mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK), + (ICE_STOP | DTO_15THDTO | CEN_DISABLE)); switch (iclk) { case CLK_INITSEQ: @@ -122,12 +119,12 @@ unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div) default: return 0; } - mmc_reg_out(OMAP_HSMMC_SYSCTL, - ICE_MASK | CLKD_MASK, (val << CLKD_OFFSET) | ICE_OSCILLATE); + mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK, + (val << CLKD_OFFSET) | ICE_OSCILLATE); - while ((OMAP_HSMMC_SYSCTL & ICS_MASK) == ICS_NOTREADY) ; + while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY); - OMAP_HSMMC_SYSCTL |= CEN_ENABLE; + writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); return 1; } @@ -137,59 +134,63 @@ unsigned char mmc_init_setup(void) mmc_board_init(); - OMAP_HSMMC_SYSCONFIG |= MMC_SOFTRESET; - while ((OMAP_HSMMC_SYSSTATUS & RESETDONE) == 0) ; + writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, + &mmc_base->sysconfig); + while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0); - OMAP_HSMMC_SYSCTL |= SOFTRESETALL; - while ((OMAP_HSMMC_SYSCTL & SOFTRESETALL) != 0x0) ; + writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); + while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0); - OMAP_HSMMC_HCTL = DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0; - OMAP_HSMMC_CAPA |= VS30_3V0SUP | VS18_1V8SUP; + writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); + writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP, + &mmc_base->capa); - reg_val = OMAP_HSMMC_CON & RESERVED_MASK; + reg_val = readl(&mmc_base->con) & RESERVED_MASK; - OMAP_HSMMC_CON = CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | - CDP_ACTIVEHIGH | MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | - STR_BLOCK | HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN; + writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH | + MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK | + HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con); mmc_clock_config(CLK_INITSEQ, 0); - OMAP_HSMMC_HCTL |= SDBP_PWRON; + writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl); - OMAP_HSMMC_IE = 0x307f0033; + writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE | + IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC, + &mmc_base->ie); mmc_init_stream(); return 1; } unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg, - unsigned int *response) + unsigned int *response) { - volatile unsigned int mmc_stat; + unsigned int mmc_stat; - while ((OMAP_HSMMC_PSTATE & DATI_MASK) == DATI_CMDDIS) ; + while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS); - OMAP_HSMMC_BLK = BLEN_512BYTESLEN | NBLK_STPCNT; - OMAP_HSMMC_STAT = 0xFFFFFFFF; - OMAP_HSMMC_ARG = arg; - OMAP_HSMMC_CMD = cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | - CCCE_NOCHECK | MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | - DE_DISABLE; + writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk); + writel(0xFFFFFFFF, &mmc_base->stat); + writel(arg, &mmc_base->arg); + writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK | + MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE, + &mmc_base->cmd); while (1) { do { - mmc_stat = OMAP_HSMMC_STAT; + mmc_stat = readl(&mmc_base->stat); } while (mmc_stat == 0); if ((mmc_stat & ERRI_MASK) != 0) return (unsigned char) mmc_stat; if (mmc_stat & CC_MASK) { - OMAP_HSMMC_STAT = CC_MASK; - response[0] = OMAP_HSMMC_RSP10; + writel(CC_MASK, &mmc_base->stat); + response[0] = readl(&mmc_base->rsp10); if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) { - response[1] = OMAP_HSMMC_RSP32; - response[2] = OMAP_HSMMC_RSP54; - response[3] = OMAP_HSMMC_RSP76; + response[1] = readl(&mmc_base->rsp32); + response[2] = readl(&mmc_base->rsp54); + response[3] = readl(&mmc_base->rsp76); } break; } @@ -199,7 +200,7 @@ unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg, unsigned char mmc_read_data(unsigned int *output_buf) { - volatile unsigned int mmc_stat; + unsigned int mmc_stat; unsigned int read_count = 0; /* @@ -207,7 +208,7 @@ unsigned char mmc_read_data(unsigned int *output_buf) */ while (1) { do { - mmc_stat = OMAP_HSMMC_STAT; + mmc_stat = readl(&mmc_base->stat); } while (mmc_stat == 0); if ((mmc_stat & ERRI_MASK) != 0) @@ -216,19 +217,22 @@ unsigned char mmc_read_data(unsigned int *output_buf) if (mmc_stat & BRR_MASK) { unsigned int k; - OMAP_HSMMC_STAT |= BRR_MASK; + writel(readl(&mmc_base->stat) | BRR_MASK, + &mmc_base->stat); for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) { - *output_buf = OMAP_HSMMC_DATA; + *output_buf = readl(&mmc_base->data); output_buf++; read_count += 4; } } if (mmc_stat & BWR_MASK) - OMAP_HSMMC_STAT |= BWR_MASK; + writel(readl(&mmc_base->stat) | BWR_MASK, + &mmc_base->stat); if (mmc_stat & TC_MASK) { - OMAP_HSMMC_STAT |= TC_MASK; + writel(readl(&mmc_base->stat) | TC_MASK, + &mmc_base->stat); break; } } @@ -272,8 +276,8 @@ unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur) mmc_card_cur->card_type = MMC_CARD; ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR; ret_cmd41 = MMC_CMD1; - OMAP_HSMMC_CON &= ~OD; - OMAP_HSMMC_CON |= OPENDRAIN; + writel(readl(&mmc_base->con) & ~OD, &mmc_base->con); + writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con); } argument = ocr_value; @@ -341,8 +345,8 @@ unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur) mmc_card_cur->RCA = ((mmc_resp_r6 *) resp)->newpublishedrca; } - OMAP_HSMMC_CON &= ~OD; - OMAP_HSMMC_CON |= NOOPENDRAIN; + writel(readl(&mmc_base->con) & ~OD, &mmc_base->con); + writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con); return 1; } @@ -517,11 +521,11 @@ unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt, void *dst) { omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data, - (unsigned long *) dst); + (unsigned long *) dst); return 1; } -int mmc_init(int verbose) +int mmc_legacy_init(int verbose) { if (configure_mmc(&cur_card_data) != 1) return 1; @@ -541,18 +545,3 @@ int mmc_init(int verbose) fat_register_device(&mmc_blk_dev, 1); return 0; } - -int mmc_read(ulong src, uchar *dst, int size) -{ - return 0; -} - -int mmc_write(uchar *src, ulong dst, int size) -{ - return 0; -} - -int mmc2info(ulong addr) -{ - return 0; -} diff --git a/cpu/pxa/mmc.c b/drivers/mmc/pxa_mmc.c index 8f5277e..8225235 100644 --- a/cpu/pxa/mmc.c +++ b/drivers/mmc/pxa_mmc.c @@ -28,9 +28,7 @@ #include <asm/arch/hardware.h> #include <part.h> -#include "mmc.h" - -#ifdef CONFIG_MMC +#include "pxa_mmc.h" extern int fat_register_device(block_dev_desc_t * dev_desc, int part_no); @@ -181,7 +179,7 @@ mmc_block_write(ulong dst, uchar * src, int len) MMC_STRPCL = MMC_STRPCL_STOP_CLK; MMC_NOB = 1; MMC_BLKLEN = len; - mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl, + mmc_cmd(MMC_CMD_WRITE_SINGLE_BLOCK, argh, argl, MMC_CMDAT_R1 | MMC_CMDAT_WRITE | MMC_CMDAT_BLOCK | MMC_CMDAT_DATA_EN); @@ -218,7 +216,7 @@ mmc_block_write(ulong dst, uchar * src, int len) int /****************************************************/ -mmc_read(ulong src, uchar * dst, int size) +pxa_mmc_read(long src, uchar * dst, int size) /****************************************************/ { ulong end, part_start, part_end, part_len, aligned_start, aligned_end; @@ -294,7 +292,7 @@ mmc_read(ulong src, uchar * dst, int size) int /****************************************************/ -mmc_write(uchar * src, ulong dst, int size) +pxa_mmc_write(uchar * src, ulong dst, int size) /****************************************************/ { ulong end, part_start, part_end, part_len, aligned_start, aligned_end; @@ -375,7 +373,7 @@ mmc_write(uchar * src, ulong dst, int size) return 0; } -ulong +static ulong /****************************************************/ mmc_bread(int dev_num, ulong blknr, lbaint_t blkcnt, void *dst) /****************************************************/ @@ -383,7 +381,7 @@ mmc_bread(int dev_num, ulong blknr, lbaint_t blkcnt, void *dst) int mmc_block_size = MMC_BLOCK_SIZE; ulong src = blknr * mmc_block_size + CONFIG_SYS_MMC_BASE; - mmc_read(src, (uchar *) dst, blkcnt * mmc_block_size); + pxa_mmc_read(src, (uchar *) dst, blkcnt * mmc_block_size); return blkcnt; } @@ -646,5 +644,3 @@ mmc_legacy_init(int verbose) return rc; } - -#endif /* CONFIG_MMC */ diff --git a/cpu/pxa/mmc.h b/drivers/mmc/pxa_mmc.h index 85e144b..6fa4268 100644 --- a/cpu/pxa/mmc.h +++ b/drivers/mmc/pxa_mmc.h @@ -135,55 +135,4 @@ #define MMC_R1B_ADDR_ERR 0x2000 #define MMC_R1B_PARAM_ERR 0x4000 -typedef struct mmc_cid -{ -/* FIXME: BYTE_ORDER */ - uchar year:4, - month:4; - uchar sn[3]; - uchar fwrev:4, - hwrev:4; - uchar name[6]; - uchar id[3]; -} mmc_cid_t; - -typedef struct mmc_csd -{ - uint8_t csd_structure:2, - spec_ver:4, - rsvd1:2; - uint8_t taac; - uint8_t nsac; - uint8_t tran_speed; - uint16_t ccc:12, - read_bl_len:4; - uint64_t read_bl_partial:1, - write_blk_misalign:1, - read_blk_misalign:1, - dsr_imp:1, - rsvd2:2, - c_size:12, - vdd_r_curr_min:3, - vdd_r_curr_max:3, - vdd_w_curr_min:3, - vdd_w_curr_max:3, - c_size_mult:3, - erase_blk_en:1, - sector_size:7, - wp_grp_size:7, - wp_grp_enable:1, - default_ecc:2, - r2w_factor:3, - write_bl_len:4, - write_bl_partial:1, - rsvd3:4, - content_prot_app:1; - uint8_t file_format_grp:1, - copy:1, - perm_write_protect:1, - tmp_write_protect:1, - file_format:2, - ecc:2; -} mmc_csd_t; - #endif /* __MMC_PXA_P_H__ */ diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 24edb27..5974d77 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -38,6 +38,7 @@ endif COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o +COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o endif diff --git a/drivers/mtd/nand/nomadik.c b/drivers/mtd/nand/nomadik.c new file mode 100644 index 0000000..b76f4cb --- /dev/null +++ b/drivers/mtd/nand/nomadik.c @@ -0,0 +1,221 @@ +/* + * (C) Copyright 2007 STMicroelectronics, <www.st.com> + * (C) Copyright 2009 Alessandro Rubini <rubini@unipv.it> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> + +static inline int parity(int b) /* b is really a byte; returns 0 or ~0 */ +{ + __asm__ __volatile__( + "eor %0, %0, %0, lsr #4\n\t" + "eor %0, %0, %0, lsr #2\n\t" + "eor %0, %0, %0, lsr #1\n\t" + "ands %0, %0, #1\n\t" + "subne %0, %0, #2\t" + : "=r" (b) : "0" (b)); + return b; +} + +/* + * This is the ECC routine used in hardware, according to the manual. + * HW claims to make the calculation but not the correction; so we must + * recalculate the bytes for a comparison. + */ +static int ecc512(const unsigned char *data, unsigned char *ecc) +{ + int gpar = 0; + int i, val, par; + int pbits = 0; /* P8, P16, ... P2048 */ + int pprime = 0; /* P8', P16', ... P2048' */ + int lowbits; /* P1, P2, P4 and primes */ + + for (i = 0; i < 512; i++) { + par = parity((val = data[i])); + gpar ^= val; + pbits ^= (i & par); + } + /* + * Ok, now gpar is global parity (xor of all bytes) + * pbits are all the parity bits (non-prime ones) + */ + par = parity(gpar); + pprime = pbits ^ par; + /* Put low bits in the right position for ecc[2] (bits 7..2) */ + lowbits = 0 + | (parity(gpar & 0xf0) & 0x80) /* P4 */ + | (parity(gpar & 0x0f) & 0x40) /* P4' */ + | (parity(gpar & 0xcc) & 0x20) /* P2 */ + | (parity(gpar & 0x33) & 0x10) /* P2' */ + | (parity(gpar & 0xaa) & 0x08) /* P1 */ + | (parity(gpar & 0x55) & 0x04); /* P1' */ + + ecc[2] = ~(lowbits | ((pbits & 0x100) >> 7) | ((pprime & 0x100) >> 8)); + /* now intermix bits for ecc[1] (P1024..P128') and ecc[0] (P64..P8') */ + ecc[1] = ~( (pbits & 0x80) >> 0 | ((pprime & 0x80) >> 1) + | ((pbits & 0x40) >> 1) | ((pprime & 0x40) >> 2) + | ((pbits & 0x20) >> 2) | ((pprime & 0x20) >> 3) + | ((pbits & 0x10) >> 3) | ((pprime & 0x10) >> 4)); + + ecc[0] = ~( (pbits & 0x8) << 4 | ((pprime & 0x8) << 3) + | ((pbits & 0x4) << 3) | ((pprime & 0x4) << 2) + | ((pbits & 0x2) << 2) | ((pprime & 0x2) << 1) + | ((pbits & 0x1) << 1) | ((pprime & 0x1) << 0)); + return 0; +} + +/* This is the method in the chip->ecc field */ +static int nomadik_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat, + uint8_t *ecc_code) +{ + return ecc512(dat, ecc_code); +} + +static int nomadik_ecc_correct(struct mtd_info *mtd, uint8_t *dat, + uint8_t *r_ecc, uint8_t *c_ecc) +{ + struct nand_chip *chip = mtd->priv; + uint32_t r, c, d, diff; /*read, calculated, xor of them */ + + if (!memcmp(r_ecc, c_ecc, chip->ecc.bytes)) + return 0; + + /* Reorder the bytes into ascending-order 24 bits -- see manual */ + r = r_ecc[2] << 22 | r_ecc[1] << 14 | r_ecc[0] << 6 | r_ecc[2] >> 2; + c = c_ecc[2] << 22 | c_ecc[1] << 14 | c_ecc[0] << 6 | c_ecc[2] >> 2; + diff = (r ^ c) & ((1<<24)-1); /* use 24 bits only */ + + /* If 12 bits are different, one per pair, it's correctable */ + if (((diff | (diff>>1)) & 0x555555) == 0x555555) { + int bit = ((diff & 2) >> 1) + | ((diff & 0x8) >> 2) | ((diff & 0x20) >> 3); + int byte; + + d = diff >> 6; /* remove bit-order info */ + byte = ((d & 2) >> 1) + | ((d & 0x8) >> 2) | ((d & 0x20) >> 3) + | ((d & 0x80) >> 4) | ((d & 0x200) >> 5) + | ((d & 0x800) >> 6) | ((d & 0x2000) >> 7) + | ((d & 0x8000) >> 8) | ((d & 0x20000) >> 9); + /* correct the single bit */ + dat[byte] ^= 1<<bit; + return 0; + } + /* If 1 bit only differs, it's one bit error in ECC, ignore */ + if ((diff ^ (1 << (ffs(diff) - 1))) == 0) + return 0; + /* Otherwise, uncorrectable */ + return -1; +} + +static void nomadik_ecc_hwctl(struct mtd_info *mtd, int mode) +{ /* mandatory in the structure but not used here */ } + + +/* This is the layout used by older installations, we keep compatible */ +struct nand_ecclayout nomadik_ecc_layout = { + .eccbytes = 3 * 4, + .eccpos = { /* each subpage has 16 bytes: pos 2,3,4 hosts ECC */ + 0x02, 0x03, 0x04, + 0x12, 0x13, 0x14, + 0x22, 0x23, 0x24, + 0x32, 0x33, 0x34}, + .oobfree = { {0x08, 0x08}, {0x18, 0x08}, {0x28, 0x08}, {0x38, 0x08} }, +}; + +#define MASK_ALE (1 << 24) /* our ALE is AD21 */ +#define MASK_CLE (1 << 23) /* our CLE is AD22 */ + +/* This is copied from the AT91SAM9 devices (Stelian Pop, Lead Tech Design) */ +static void nomadik_nand_hwcontrol(struct mtd_info *mtd, + int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + u32 pcr0 = readl(REG_FSMC_PCR0); + + if (ctrl & NAND_CTRL_CHANGE) { + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + IO_ADDR_W &= ~(MASK_ALE | MASK_CLE); + + if (ctrl & NAND_CLE) + IO_ADDR_W |= MASK_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= MASK_ALE; + + if (ctrl & NAND_NCE) + writel(pcr0 | 0x4, REG_FSMC_PCR0); + else + writel(pcr0 & ~0x4, REG_FSMC_PCR0); + + this->IO_ADDR_W = (void *) IO_ADDR_W; + this->IO_ADDR_R = (void *) IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +/* Returns 1 when ready; upper layers timeout at 20ms with timer routines */ +static int nomadik_nand_ready(struct mtd_info *mtd) +{ + return 1; /* The ready bit is handled in hardware */ +} + +/* Copy a buffer 32bits at a time: faster than defualt method which is 8bit */ +static void nomadik_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + int i; + struct nand_chip *chip = mtd->priv; + u32 *p = (u32 *) buf; + + len >>= 2; + writel(0, REG_FSMC_ECCR0); + for (i = 0; i < len; i++) + p[i] = readl(chip->IO_ADDR_R); +} + +int board_nand_init(struct nand_chip *chip) +{ + /* Set up the FSMC_PCR0 for nand access*/ + writel(0x0000004a, REG_FSMC_PCR0); + /* Set up FSMC_PMEM0, FSMC_PATT0 with timing data for access */ + writel(0x00020401, REG_FSMC_PMEM0); + writel(0x00020404, REG_FSMC_PATT0); + + chip->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING; + chip->cmd_ctrl = nomadik_nand_hwcontrol; + chip->dev_ready = nomadik_nand_ready; + /* The chip allows 32bit reads, so avoid the default 8bit copy */ + chip->read_buf = nomadik_nand_read_buf; + + /* ECC: follow the hardware-defined rulse, but do it in sw */ + chip->ecc.mode = NAND_ECC_HW; + chip->ecc.bytes = 3; + chip->ecc.size = 512; + chip->ecc.layout = &nomadik_ecc_layout; + chip->ecc.calculate = nomadik_ecc_calculate; + chip->ecc.hwctl = nomadik_ecc_hwctl; + chip->ecc.correct = nomadik_ecc_correct; + + return 0; +} diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c index efac746..bfe87fa 100644 --- a/drivers/net/dnet.c +++ b/drivers/net/dnet.c @@ -393,4 +393,3 @@ int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr) return 0; } - diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index b6fd0d7..d0efd73 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -25,13 +25,14 @@ include $(TOPDIR)/config.mk LIB := $(obj)libserial.a +COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o COBJS-$(CONFIG_MCFUART) += mcfuart.o COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o -COBJS-y += ns16550.o +COBJS-$(CONFIG_SYS_NS16550) += ns16550.o COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o -COBJS-y += serial.o +COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c new file mode 100644 index 0000000..5a7fb6b --- /dev/null +++ b/drivers/serial/arm_dcc.c @@ -0,0 +1,226 @@ +/* + * Copyright (C) 2004-2007 ARM Limited. + * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * As a special exception, if other files instantiate templates or use macros + * or inline functions from this file, or you compile this file and link it + * with other works to produce a work based on this file, this file does not + * by itself cause the resulting work to be covered by the GNU General Public + * License. However the source code for this file must still be made available + * in accordance with section (3) of the GNU General Public License. + + * This exception does not invalidate any other reasons why a work based on + * this file might be covered by the GNU General Public License. + */ + +#include <common.h> +#include <devices.h> + +#define DCC_ARM9_RBIT (1 << 0) +#define DCC_ARM9_WBIT (1 << 1) +#define DCC_ARM11_RBIT (1 << 30) +#define DCC_ARM11_WBIT (1 << 29) + +#define read_core_id(x) do { \ + __asm__ ("mrc p15, 0, %0, c0, c0, 0\n" : "=r" (x)); \ + x = (x >> 4) & 0xFFF; \ + } while (0); + +/* + * ARM9 + */ +#define write_arm9_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) + +#define read_arm9_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) + +#define status_arm9_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) + +#define can_read_arm9_dcc(x) do { \ + status_arm9_dcc(x); \ + x &= DCC_ARM9_RBIT; \ + } while (0); + +#define can_write_arm9_dcc(x) do { \ + status_arm9_dcc(x); \ + x &= DCC_ARM9_WBIT; \ + x = (x == 0); \ + } while (0); + +/* + * ARM11 + */ +#define write_arm11_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) + +#define read_arm11_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) + +#define status_arm11_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) + +#define can_read_arm11_dcc(x) do { \ + status_arm11_dcc(x); \ + x &= DCC_ARM11_RBIT; \ + } while (0); + +#define can_write_arm11_dcc(x) do { \ + status_arm11_dcc(x); \ + x &= DCC_ARM11_WBIT; \ + x = (x == 0); \ + } while (0); + +#define TIMEOUT_COUNT 0x4000000 + +static enum { + arm9_and_earlier, + arm11_and_later +} arm_type = arm9_and_earlier; + +#ifndef CONFIG_ARM_DCC_MULTI +#define arm_dcc_init serial_init +void serial_setbrg(void) {} +#define arm_dcc_getc serial_getc +#define arm_dcc_putc serial_putc +#define arm_dcc_puts serial_puts +#define arm_dcc_tstc serial_tstc +#endif + +int arm_dcc_init(void) +{ + register unsigned int id; + + read_core_id(id); + + if (id >= 0xb00) + arm_type = arm11_and_later; + else + arm_type = arm9_and_earlier; + + return 0; +} + +int arm_dcc_getc(void) +{ + int ch; + register unsigned int reg; + + switch (arm_type) { + case arm11_and_later: + do { + can_read_arm11_dcc(reg); + } while (!reg); + read_arm11_dcc(ch); + break; + + case arm9_and_earlier: + default: + do { + can_read_arm9_dcc(reg); + } while (!reg); + read_arm9_dcc(ch); + break; + } + + return ch; +} + +void arm_dcc_putc(char ch) +{ + register unsigned int reg; + unsigned int timeout_count = TIMEOUT_COUNT; + + switch (arm_type) { + case arm11_and_later: + while (--timeout_count) { + can_write_arm11_dcc(reg); + if (reg) + break; + } + if (timeout_count == 0) + return; + else + write_arm11_dcc(ch); + break; + + case arm9_and_earlier: + default: + while (--timeout_count) { + can_write_arm9_dcc(reg); + if (reg) + break; + } + if (timeout_count == 0) + return; + else + write_arm9_dcc(ch); + break; + } +} + +void arm_dcc_puts(const char *s) +{ + while (*s) + arm_dcc_putc(*s++); +} + +int arm_dcc_tstc(void) +{ + register unsigned int reg; + + switch (arm_type) { + case arm11_and_later: + can_read_arm11_dcc(reg); + break; + case arm9_and_earlier: + default: + can_read_arm9_dcc(reg); + break; + } + + return reg; +} + +#ifdef CONFIG_ARM_DCC_MULTI +static device_t arm_dcc_dev; + +int drv_arm_dcc_init(void) +{ + int rc; + + /* Device initialization */ + memset(&arm_dcc_dev, 0, sizeof(arm_dcc_dev)); + + strcpy(arm_dcc_dev.name, "dcc"); + arm_dcc_dev.ext = 0; /* No extensions */ + arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT; + arm_dcc_dev.tstc = arm_dcc_tstc; /* 'tstc' function */ + arm_dcc_dev.getc = arm_dcc_getc; /* 'getc' function */ + arm_dcc_dev.putc = arm_dcc_putc; /* 'putc' function */ + arm_dcc_dev.puts = arm_dcc_puts; /* 'puts' function */ + + rc = device_register(&arm_dcc_dev); + + if (rc == 0) { + arm_dcc_init(); + return 1; + } + + return 0; +} +#endif diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 1b347e9..397f5df 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -5,9 +5,6 @@ */ #include <config.h> - -#ifdef CONFIG_SYS_NS16550 - #include <ns16550.h> #define LCRVAL LCR_8N1 /* 8 data, 1 stop, no parity */ @@ -36,7 +33,7 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) #else com_port->mdr1 = 0; /* /16 is proper to hit 115200 with 48MHz */ #endif -#endif +#endif /* CONFIG_OMAP */ } #ifndef CONFIG_NS16550_MIN_FUNCTIONS @@ -80,4 +77,3 @@ int NS16550_tstc (NS16550_t com_port) } #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ -#endif diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index bce7548..966df9a 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -23,8 +23,6 @@ #include <common.h> -#ifdef CONFIG_SYS_NS16550_SERIAL - #include <ns16550.h> #ifdef CONFIG_NS87308 #include <ns87308.h> @@ -328,5 +326,3 @@ DECLARE_ESERIAL_FUNCTIONS(4); struct serial_device eserial4_device = INIT_ESERIAL_STRUCTURE(4,"eserial3","EUART4"); #endif /* CONFIG_SERIAL_MULTI */ - -#endif diff --git a/drivers/usb/r8a66597-hcd.c b/drivers/usb/r8a66597-hcd.c index 288f41a..db611b6 100644 --- a/drivers/usb/r8a66597-hcd.c +++ b/drivers/usb/r8a66597-hcd.c @@ -36,12 +36,37 @@ static unsigned short vif = CONFIG_R8A66597_LDRV; static unsigned short endian = CONFIG_R8A66597_ENDIAN; static struct r8a66597 gr8a66597; -static void set_devadd_reg(struct r8a66597 *r8a66597, u8 r8a66597_address, - u16 usbspd, u8 upphub, u8 hubport, int port) +static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport) { - u16 val; + int i; + + *hub_devnum = 0; + *hubport = 0; + + /* check a device connected to root_hub */ + if ((dev->parent && dev->parent->devnum == 1) || + (dev->devnum == 1)) + return; + + for (i = 0; i < USB_MAXCHILDREN; i++) { + if (dev->parent->children[i] == dev) { + *hub_devnum = (u8)dev->parent->devnum; + *hubport = i; + return; + } + } + + printf("get_hub_data error.\n"); +} + +static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address, + struct usb_device *dev, int port) +{ + u16 val, usbspd, upphub, hubport; unsigned long devadd_reg = get_devadd_addr(r8a66597_address); + get_hub_data(dev, &upphub, &hubport); + usbspd = r8a66597->speed; val = (upphub << 11) | (hubport << 8) | (usbspd << 6) | (port & 0x0001); r8a66597_write(r8a66597, val, devadd_reg); } @@ -818,7 +843,7 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n", pipe, buffer, transfer_len, dev->devnum); - set_devadd_reg(r8a66597, dev->devnum, r8a66597->speed, 0, 0, 0); + set_devadd(r8a66597, dev->devnum, dev, 0); pipe_buffer_setting(r8a66597, dev, pipe); @@ -854,13 +879,14 @@ int submit_control_msg(struct usb_device *dev, unsigned long pipe, setup); R8A66597_DPRINT("%s: setup\n", __func__); - set_devadd_reg(r8a66597, r8a66597_address, r8a66597->speed, 0, 0, 0); + set_devadd(r8a66597, r8a66597_address, dev, 0); if (send_setup_packet(r8a66597, dev, setup) < 0) { printf("setup packet send error\n"); return -1; } + dev->act_len = 0; if (usb_pipein(pipe)) if (receive_control_packet(r8a66597, dev, buffer, transfer_len) < 0) diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h index 69c0b36..5b344f8 100644 --- a/include/asm-arm/arch-omap3/cpu.h +++ b/include/asm-arm/arch-omap3/cpu.h @@ -35,11 +35,31 @@ typedef struct ctrl { unsigned short gpmc_nwe; /* 0xC4 */ unsigned char res2[0x22A]; unsigned int status; /* 0x2F0 */ + unsigned int gpstatus; /* 0x2F4 */ + unsigned char res3[0x08]; + unsigned int rpubkey_0; /* 0x300 */ + unsigned int rpubkey_1; /* 0x304 */ + unsigned int rpubkey_2; /* 0x308 */ + unsigned int rpubkey_3; /* 0x30C */ + unsigned int rpubkey_4; /* 0x310 */ + unsigned char res4[0x04]; + unsigned int randkey_0; /* 0x318 */ + unsigned int randkey_1; /* 0x31C */ + unsigned int randkey_2; /* 0x320 */ + unsigned int randkey_3; /* 0x324 */ + unsigned char res5[0x124]; + unsigned int ctrl_omap_stat; /* 0x44C */ } ctrl_t; #else /* __ASSEMBLY__ */ #define CONTROL_STATUS 0x2F0 #endif /* __ASSEMBLY__ */ +/* cpu type */ +#define OMAP3503 0x5c00 +#define OMAP3515 0x1c00 +#define OMAP3525 0x4c00 +#define OMAP3530 0x0c00 + /* device type */ #define DEVICE_MASK (0x7 << 8) #define SYSBOOT_MASK 0x1F diff --git a/include/asm-arm/arch-omap3/mmc_host_def.h b/include/asm-arm/arch-omap3/mmc_host_def.h index dfb376a..aa751c9 100644 --- a/include/asm-arm/arch-omap3/mmc_host_def.h +++ b/include/asm-arm/arch-omap3/mmc_host_def.h @@ -25,30 +25,50 @@ #ifndef MMC_HOST_DEF_H #define MMC_HOST_DEF_H +/* T2 Register definitions */ +#define T2_BASE 0x48002000 + +typedef struct t2 { + unsigned char res1[0x274]; + unsigned int devconf0; /* 0x274 */ + unsigned char res2[0x2A8]; + unsigned int pbias_lite; /* 0x520 */ +} t2_t; + +#define MMCSDIO1ADPCLKISEL (1 << 24) + +#define PBIASLITEPWRDNZ0 (1 << 1) +#define PBIASSPEEDCTRL0 (1 << 2) +#define PBIASLITEPWRDNZ1 (1 << 9) + /* * OMAP HSMMC register definitions */ -#define OMAP_HSMMC_SYSCONFIG (*(unsigned int *) 0x4809C010) -#define OMAP_HSMMC_SYSSTATUS (*(unsigned int *) 0x4809C014) -#define OMAP_HSMMC_CON (*(unsigned int *) 0x4809C02C) -#define OMAP_HSMMC_BLK (*(unsigned int *) 0x4809C104) -#define OMAP_HSMMC_ARG (*(unsigned int *) 0x4809C108) -#define OMAP_HSMMC_CMD (*(unsigned int *) 0x4809C10C) -#define OMAP_HSMMC_RSP10 (*(unsigned int *) 0x4809C110) -#define OMAP_HSMMC_RSP32 (*(unsigned int *) 0x4809C114) -#define OMAP_HSMMC_RSP54 (*(unsigned int *) 0x4809C118) -#define OMAP_HSMMC_RSP76 (*(unsigned int *) 0x4809C11C) -#define OMAP_HSMMC_DATA (*(unsigned int *) 0x4809C120) -#define OMAP_HSMMC_PSTATE (*(unsigned int *) 0x4809C124) -#define OMAP_HSMMC_HCTL (*(unsigned int *) 0x4809C128) -#define OMAP_HSMMC_SYSCTL (*(unsigned int *) 0x4809C12C) -#define OMAP_HSMMC_STAT (*(unsigned int *) 0x4809C130) -#define OMAP_HSMMC_IE (*(unsigned int *) 0x4809C134) -#define OMAP_HSMMC_CAPA (*(unsigned int *) 0x4809C140) +#define OMAP_HSMMC_BASE 0x4809C000 -/* T2 Register definitions */ -#define CONTROL_DEV_CONF0 (*(unsigned int *) 0x48002274) -#define CONTROL_PBIAS_LITE (*(unsigned int *) 0x48002520) +typedef struct hsmmc { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned char res2[0x14]; + unsigned int con; /* 0x2C */ + unsigned char res3[0xD4]; + unsigned int blk; /* 0x104 */ + unsigned int arg; /* 0x108 */ + unsigned int cmd; /* 0x10C */ + unsigned int rsp10; /* 0x110 */ + unsigned int rsp32; /* 0x114 */ + unsigned int rsp54; /* 0x118 */ + unsigned int rsp76; /* 0x11C */ + unsigned int data; /* 0x120 */ + unsigned int pstate; /* 0x124 */ + unsigned int hctl; /* 0x128 */ + unsigned int sysctl; /* 0x12C */ + unsigned int stat; /* 0x130 */ + unsigned int ie; /* 0x134 */ + unsigned char res4[0x8]; + unsigned int capa; /* 0x140 */ +} hsmmc_t; /* * OMAP HS MMC Bit definitions @@ -159,8 +179,6 @@ typedef struct { } mmc_card_data; #define mmc_reg_out(addr, mask, val)\ - (addr) = (((addr)) & (~(mask))) | ((val) & (mask)); -#define mmc_reg_out(addr, mask, val)\ - (addr) = (((addr)) & (~(mask))) | ((val) & (mask)); + writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr)) #endif /* MMC_HOST_DEF_H */ diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 7473656..02e36d7 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -97,7 +97,8 @@ typedef struct s32ktimer { typedef struct gpio { unsigned char res1[0x34]; unsigned int oe; /* 0x34 */ - unsigned char res2[0x58]; + unsigned int datain; /* 0x38 */ + unsigned char res2[0x54]; unsigned int cleardataout; /* 0x90 */ unsigned int setdataout; /* 0x94 */ } gpio_t; @@ -202,6 +203,8 @@ typedef struct gpio { #define VAUX2_DEDICATED 0x79 #define VAUX3_DEV_GRP 0x7A #define VAUX3_DEDICATED 0x7D +#define VMMC1_DEV_GRP 0x82 +#define VMMC1_DEDICATED 0x85 #define VPLL2_DEV_GRP 0x8E #define VPLL2_DEDICATED 0x91 #define VDAC_DEV_GRP 0x96 @@ -214,5 +217,6 @@ typedef struct gpio { #define VAUX3_VSEL_28 0x03 #define VPLL2_VSEL_18 0x05 #define VDAC_VSEL_18 0x03 +#define VMMC1_VSEL_30 0x02 #endif diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 4c624e8..ab3e168 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -25,7 +25,6 @@ typedef struct { u32 board_type_v1; u32 board_type_v2; u32 mtype; - char *cpu_string; char *board_string; char *nand_string; } omap3_sysinfo; diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h index ce6d25f..2c1e69b 100644 --- a/include/asm-arm/mach-types.h +++ b/include/asm-arm/mach-types.h @@ -1376,7 +1376,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_OLIP8 1378 #define MACH_TYPE_GHI270HG 1379 #define MACH_TYPE_DAVINCI_DM6467_EVM 1380 -#define MACH_TYPE_DAVINCI_DM350_EVM 1381 +#define MACH_TYPE_DAVINCI_DM355_EVM 1381 #define MACH_TYPE_BLACKRIVER 1383 #define MACH_TYPE_SANDGATEWP 1384 #define MACH_TYPE_CDOTBWSG 1385 @@ -1806,7 +1806,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_PILZ_PMI5 1820 #define MACH_TYPE_JADE 1821 #define MACH_TYPE_KS8695_SOFTPLC 1822 -#define MACH_TYPE_GPRISC4 1823 +#define MACH_TYPE_GPRISC3 1823 #define MACH_TYPE_STAMP9260 1824 #define MACH_TYPE_SMDK6430 1825 #define MACH_TYPE_SMDKC100 1826 @@ -1857,6 +1857,139 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_IMX27IPCAM 1871 #define MACH_TYPE_NEMOC 1872 #define MACH_TYPE_GENEVA 1873 +#define MACH_TYPE_HTCPHAROS 1874 +#define MACH_TYPE_NEONC 1875 +#define MACH_TYPE_NAS7100 1876 +#define MACH_TYPE_TEUPHONE 1877 +#define MACH_TYPE_ANNAX_ETH2 1878 +#define MACH_TYPE_CSB733 1879 +#define MACH_TYPE_BK3 1880 +#define MACH_TYPE_OMAP_EM32 1881 +#define MACH_TYPE_ET9261CP 1882 +#define MACH_TYPE_JASPERC 1883 +#define MACH_TYPE_ISSI_ARM9 1884 +#define MACH_TYPE_UED 1885 +#define MACH_TYPE_ESIBLADE 1886 +#define MACH_TYPE_EYE02 1887 +#define MACH_TYPE_IMX27KBD 1888 +#define MACH_TYPE_SST61VC010_FPGA 1889 +#define MACH_TYPE_KIXVP435 1890 +#define MACH_TYPE_KIXNP435 1891 +#define MACH_TYPE_AFRICA 1892 +#define MACH_TYPE_NH233 1893 +#define MACH_TYPE_RD88F6183AP_GE 1894 +#define MACH_TYPE_BCM4760 1895 +#define MACH_TYPE_EDDY_V2 1896 +#define MACH_TYPE_REALVIEW_PBA8 1897 +#define MACH_TYPE_HID_A7 1898 +#define MACH_TYPE_HERO 1899 +#define MACH_TYPE_OMAP_POSEIDON 1900 +#define MACH_TYPE_REALVIEW_PBX 1901 +#define MACH_TYPE_MICRO9S 1902 +#define MACH_TYPE_MAKO 1903 +#define MACH_TYPE_XDAFLAME 1904 +#define MACH_TYPE_PHIDGET_SBC2 1905 +#define MACH_TYPE_LIMESTONE 1906 +#define MACH_TYPE_IPROBE_C32 1907 +#define MACH_TYPE_RUT100 1908 +#define MACH_TYPE_ASUSP535 1909 +#define MACH_TYPE_HTCRAPHAEL 1910 +#define MACH_TYPE_SYGDG1 1911 +#define MACH_TYPE_SYGDG2 1912 +#define MACH_TYPE_SEOUL 1913 +#define MACH_TYPE_SALERNO 1914 +#define MACH_TYPE_UCN_S3C64XX 1915 +#define MACH_TYPE_MSM7201A 1916 +#define MACH_TYPE_LPR1 1917 +#define MACH_TYPE_ARMADILLO500FX 1918 +#define MACH_TYPE_G3EVM 1919 +#define MACH_TYPE_Z3_DM355 1920 +#define MACH_TYPE_W90P910EVB 1921 +#define MACH_TYPE_W90P920EVB 1922 +#define MACH_TYPE_W90P950EVB 1923 +#define MACH_TYPE_W90N960EVB 1924 +#define MACH_TYPE_CAMHD 1925 +#define MACH_TYPE_MVC100 1926 +#define MACH_TYPE_ELECTRUM_200 1927 +#define MACH_TYPE_HTCJADE 1928 +#define MACH_TYPE_MEMPHIS 1929 +#define MACH_TYPE_IMX27SBC 1930 +#define MACH_TYPE_LEXTAR 1931 +#define MACH_TYPE_MV88F6281GTW_GE 1932 +#define MACH_TYPE_NCP 1933 +#define MACH_TYPE_Z32AN 1934 +#define MACH_TYPE_TMQ_CAPD 1935 +#define MACH_TYPE_OMAP3_WL 1936 +#define MACH_TYPE_CHUMBY 1937 +#define MACH_TYPE_ATSARM9 1938 +#define MACH_TYPE_DAVINCI_DM365_EVM 1939 +#define MACH_TYPE_BAHAMAS 1940 +#define MACH_TYPE_DAS 1941 +#define MACH_TYPE_MINIDAS 1942 +#define MACH_TYPE_VK1000 1943 +#define MACH_TYPE_CENTRO 1944 +#define MACH_TYPE_CTERA_2BAY 1945 +#define MACH_TYPE_EDGECONNECT 1946 +#define MACH_TYPE_ND27000 1947 +#define MACH_TYPE_GEMALTO_COBRA 1948 +#define MACH_TYPE_INGELABS_COMET 1949 +#define MACH_TYPE_POLLUX_WIZ 1950 +#define MACH_TYPE_BLACKSTONE 1951 +#define MACH_TYPE_TOPAZ 1952 +#define MACH_TYPE_AIXLE 1953 +#define MACH_TYPE_MW998 1954 +#define MACH_TYPE_NOKIA_RX51 1955 +#define MACH_TYPE_VSC5605EV 1956 +#define MACH_TYPE_NT98700DK 1957 +#define MACH_TYPE_ICONTACT 1958 +#define MACH_TYPE_SWARCO_FRCPU 1959 +#define MACH_TYPE_SWARCO_SCPU 1960 +#define MACH_TYPE_BBOX_P16 1961 +#define MACH_TYPE_BSTD 1962 +#define MACH_TYPE_SBC2440II 1963 +#define MACH_TYPE_PCM034 1964 +#define MACH_TYPE_NESO 1965 +#define MACH_TYPE_WLNX_9G20 1966 +#define MACH_TYPE_OMAP_ZOOM2 1967 +#define MACH_TYPE_TOTEMNOVA 1968 +#define MACH_TYPE_C5000 1969 +#define MACH_TYPE_UNIPO_AT91SAM9263 1970 +#define MACH_TYPE_ETHERNUT5 1971 +#define MACH_TYPE_ARM11 1972 +#define MACH_TYPE_CPUAT9260 1973 +#define MACH_TYPE_CPUPXA255 1974 +#define MACH_TYPE_CPUIMX27 1975 +#define MACH_TYPE_CHEFLUX 1976 +#define MACH_TYPE_EB_CPUX9K2 1977 +#define MACH_TYPE_OPCOTEC 1978 +#define MACH_TYPE_YT 1979 +#define MACH_TYPE_MOTOQ 1980 +#define MACH_TYPE_BSB1 1981 +#define MACH_TYPE_ACS5K 1982 +#define MACH_TYPE_MILAN 1983 +#define MACH_TYPE_QUARTZV2 1984 +#define MACH_TYPE_RSVP 1985 +#define MACH_TYPE_RMP200 1986 +#define MACH_TYPE_SNAPPER_9260 1987 +#define MACH_TYPE_DSM320 1988 +#define MACH_TYPE_ADSGCM 1989 +#define MACH_TYPE_ASE2_400 1990 +#define MACH_TYPE_PIZZA 1991 +#define MACH_TYPE_SPOT_NGPL 1992 +#define MACH_TYPE_ARMATA 1993 +#define MACH_TYPE_EXEDA 1994 +#define MACH_TYPE_MX31SF005 1995 +#define MACH_TYPE_F5D8231_4_V2 1996 +#define MACH_TYPE_Q2440 1997 +#define MACH_TYPE_QQ2440 1998 +#define MACH_TYPE_MINI2440 1999 +#define MACH_TYPE_COLIBRI300 2000 +#define MACH_TYPE_JADES 2001 +#define MACH_TYPE_SPARK 2002 +#define MACH_TYPE_BENZINA 2003 +#define MACH_TYPE_BLAZE 2004 +#define MACH_TYPE_LINKSTATION_LS_HGL 2005 +#define MACH_TYPE_HTCVENUS 2006 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -18226,14 +18359,14 @@ extern unsigned int __machine_arch_type; # define machine_is_davinci_dm6467_evm() (0) #endif -#ifdef CONFIG_MACH_DAVINCI_DM350_EVM +#ifdef CONFIG_MACH_DAVINCI_DM355_EVM # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_DAVINCI_DM350_EVM +# define machine_arch_type MACH_TYPE_DAVINCI_DM355_EVM # endif -# define machine_is_davinci_dm355_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM350_EVM) +# define machine_is_davinci_dm355_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM355_EVM) #else # define machine_is_davinci_dm355_evm() (0) #endif @@ -22925,9 +23058,9 @@ extern unsigned int __machine_arch_type; # else # define machine_arch_type MACH_TYPE_AT572D940HFEB # endif -# define machine_is_at572d940hfeb() (machine_arch_type == MACH_TYPE_AT572D940HFEB) +# define machine_is_at572d940hfek() (machine_arch_type == MACH_TYPE_AT572D940HFEB) #else -# define machine_is_at572d940hfeb() (0) +# define machine_is_at572d940hfek() (0) #endif #ifdef CONFIG_MACH_CYBOOK3 @@ -23386,14 +23519,14 @@ extern unsigned int __machine_arch_type; # define machine_is_ks8695_softplc() (0) #endif -#ifdef CONFIG_MACH_GPRISC4 +#ifdef CONFIG_MACH_GPRISC3 # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_GPRISC4 +# define machine_arch_type MACH_TYPE_GPRISC3 # endif -# define machine_is_gprisc3() (machine_arch_type == MACH_TYPE_GPRISC4) +# define machine_is_gprisc3() (machine_arch_type == MACH_TYPE_GPRISC3) #else # define machine_is_gprisc3() (0) #endif @@ -23981,9 +24114,9 @@ extern unsigned int __machine_arch_type; # else # define machine_arch_type MACH_TYPE_NEMOC # endif -# define machine_is_nenoc() (machine_arch_type == MACH_TYPE_NEMOC) +# define machine_is_nemoc() (machine_arch_type == MACH_TYPE_NEMOC) #else -# define machine_is_nenoc() (0) +# define machine_is_nemoc() (0) #endif #ifdef CONFIG_MACH_GENEVA @@ -23998,6 +24131,1602 @@ extern unsigned int __machine_arch_type; # define machine_is_geneva() (0) #endif +#ifdef CONFIG_MACH_HTCPHAROS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCPHAROS +# endif +# define machine_is_htcpharos() (machine_arch_type == MACH_TYPE_HTCPHAROS) +#else +# define machine_is_htcpharos() (0) +#endif + +#ifdef CONFIG_MACH_NEONC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NEONC +# endif +# define machine_is_neonc() (machine_arch_type == MACH_TYPE_NEONC) +#else +# define machine_is_neonc() (0) +#endif + +#ifdef CONFIG_MACH_NAS7100 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NAS7100 +# endif +# define machine_is_nas7100() (machine_arch_type == MACH_TYPE_NAS7100) +#else +# define machine_is_nas7100() (0) +#endif + +#ifdef CONFIG_MACH_TEUPHONE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TEUPHONE +# endif +# define machine_is_teuphone() (machine_arch_type == MACH_TYPE_TEUPHONE) +#else +# define machine_is_teuphone() (0) +#endif + +#ifdef CONFIG_MACH_ANNAX_ETH2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ANNAX_ETH2 +# endif +# define machine_is_annax_eth2() (machine_arch_type == MACH_TYPE_ANNAX_ETH2) +#else +# define machine_is_annax_eth2() (0) +#endif + +#ifdef CONFIG_MACH_CSB733 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CSB733 +# endif +# define machine_is_csb733() (machine_arch_type == MACH_TYPE_CSB733) +#else +# define machine_is_csb733() (0) +#endif + +#ifdef CONFIG_MACH_BK3 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BK3 +# endif +# define machine_is_bk3() (machine_arch_type == MACH_TYPE_BK3) +#else +# define machine_is_bk3() (0) +#endif + +#ifdef CONFIG_MACH_OMAP_EM32 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP_EM32 +# endif +# define machine_is_omap_em32() (machine_arch_type == MACH_TYPE_OMAP_EM32) +#else +# define machine_is_omap_em32() (0) +#endif + +#ifdef CONFIG_MACH_ET9261CP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ET9261CP +# endif +# define machine_is_et9261cp() (machine_arch_type == MACH_TYPE_ET9261CP) +#else +# define machine_is_et9261cp() (0) +#endif + +#ifdef CONFIG_MACH_JASPERC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_JASPERC +# endif +# define machine_is_jasperc() (machine_arch_type == MACH_TYPE_JASPERC) +#else +# define machine_is_jasperc() (0) +#endif + +#ifdef CONFIG_MACH_ISSI_ARM9 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ISSI_ARM9 +# endif +# define machine_is_issi_arm9() (machine_arch_type == MACH_TYPE_ISSI_ARM9) +#else +# define machine_is_issi_arm9() (0) +#endif + +#ifdef CONFIG_MACH_UED +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UED +# endif +# define machine_is_ued() (machine_arch_type == MACH_TYPE_UED) +#else +# define machine_is_ued() (0) +#endif + +#ifdef CONFIG_MACH_ESIBLADE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ESIBLADE +# endif +# define machine_is_esiblade() (machine_arch_type == MACH_TYPE_ESIBLADE) +#else +# define machine_is_esiblade() (0) +#endif + +#ifdef CONFIG_MACH_EYE02 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EYE02 +# endif +# define machine_is_eye02() (machine_arch_type == MACH_TYPE_EYE02) +#else +# define machine_is_eye02() (0) +#endif + +#ifdef CONFIG_MACH_IMX27KBD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IMX27KBD +# endif +# define machine_is_imx27kbd() (machine_arch_type == MACH_TYPE_IMX27KBD) +#else +# define machine_is_imx27kbd() (0) +#endif + +#ifdef CONFIG_MACH_SST61VC010_FPGA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SST61VC010_FPGA +# endif +# define machine_is_sst61vc010_fpga() (machine_arch_type == MACH_TYPE_SST61VC010_FPGA) +#else +# define machine_is_sst61vc010_fpga() (0) +#endif + +#ifdef CONFIG_MACH_KIXVP435 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_KIXVP435 +# endif +# define machine_is_kixvp435() (machine_arch_type == MACH_TYPE_KIXVP435) +#else +# define machine_is_kixvp435() (0) +#endif + +#ifdef CONFIG_MACH_KIXNP435 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_KIXNP435 +# endif +# define machine_is_kixnp435() (machine_arch_type == MACH_TYPE_KIXNP435) +#else +# define machine_is_kixnp435() (0) +#endif + +#ifdef CONFIG_MACH_AFRICA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AFRICA +# endif +# define machine_is_africa() (machine_arch_type == MACH_TYPE_AFRICA) +#else +# define machine_is_africa() (0) +#endif + +#ifdef CONFIG_MACH_NH233 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NH233 +# endif +# define machine_is_nh233() (machine_arch_type == MACH_TYPE_NH233) +#else +# define machine_is_nh233() (0) +#endif + +#ifdef CONFIG_MACH_RD88F6183AP_GE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RD88F6183AP_GE +# endif +# define machine_is_rd88f6183ap_ge() (machine_arch_type == MACH_TYPE_RD88F6183AP_GE) +#else +# define machine_is_rd88f6183ap_ge() (0) +#endif + +#ifdef CONFIG_MACH_BCM4760 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BCM4760 +# endif +# define machine_is_bcm4760() (machine_arch_type == MACH_TYPE_BCM4760) +#else +# define machine_is_bcm4760() (0) +#endif + +#ifdef CONFIG_MACH_EDDY_V2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EDDY_V2 +# endif +# define machine_is_eddy_v2() (machine_arch_type == MACH_TYPE_EDDY_V2) +#else +# define machine_is_eddy_v2() (0) +#endif + +#ifdef CONFIG_MACH_REALVIEW_PBA8 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_REALVIEW_PBA8 +# endif +# define machine_is_realview_pba8() (machine_arch_type == MACH_TYPE_REALVIEW_PBA8) +#else +# define machine_is_realview_pba8() (0) +#endif + +#ifdef CONFIG_MACH_HID_A7 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HID_A7 +# endif +# define machine_is_hid_a7() (machine_arch_type == MACH_TYPE_HID_A7) +#else +# define machine_is_hid_a7() (0) +#endif + +#ifdef CONFIG_MACH_HERO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HERO +# endif +# define machine_is_hero() (machine_arch_type == MACH_TYPE_HERO) +#else +# define machine_is_hero() (0) +#endif + +#ifdef CONFIG_MACH_OMAP_POSEIDON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP_POSEIDON +# endif +# define machine_is_omap_poseidon() (machine_arch_type == MACH_TYPE_OMAP_POSEIDON) +#else +# define machine_is_omap_poseidon() (0) +#endif + +#ifdef CONFIG_MACH_REALVIEW_PBX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_REALVIEW_PBX +# endif +# define machine_is_realview_pbx() (machine_arch_type == MACH_TYPE_REALVIEW_PBX) +#else +# define machine_is_realview_pbx() (0) +#endif + +#ifdef CONFIG_MACH_MICRO9S +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MICRO9S +# endif +# define machine_is_micro9s() (machine_arch_type == MACH_TYPE_MICRO9S) +#else +# define machine_is_micro9s() (0) +#endif + +#ifdef CONFIG_MACH_MAKO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MAKO +# endif +# define machine_is_mako() (machine_arch_type == MACH_TYPE_MAKO) +#else +# define machine_is_mako() (0) +#endif + +#ifdef CONFIG_MACH_XDAFLAME +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_XDAFLAME +# endif +# define machine_is_xdaflame() (machine_arch_type == MACH_TYPE_XDAFLAME) +#else +# define machine_is_xdaflame() (0) +#endif + +#ifdef CONFIG_MACH_PHIDGET_SBC2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PHIDGET_SBC2 +# endif +# define machine_is_phidget_sbc2() (machine_arch_type == MACH_TYPE_PHIDGET_SBC2) +#else +# define machine_is_phidget_sbc2() (0) +#endif + +#ifdef CONFIG_MACH_LIMESTONE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LIMESTONE +# endif +# define machine_is_limestone() (machine_arch_type == MACH_TYPE_LIMESTONE) +#else +# define machine_is_limestone() (0) +#endif + +#ifdef CONFIG_MACH_IPROBE_C32 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IPROBE_C32 +# endif +# define machine_is_iprobe_c32() (machine_arch_type == MACH_TYPE_IPROBE_C32) +#else +# define machine_is_iprobe_c32() (0) +#endif + +#ifdef CONFIG_MACH_RUT100 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RUT100 +# endif +# define machine_is_rut100() (machine_arch_type == MACH_TYPE_RUT100) +#else +# define machine_is_rut100() (0) +#endif + +#ifdef CONFIG_MACH_ASUSP535 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ASUSP535 +# endif +# define machine_is_asusp535() (machine_arch_type == MACH_TYPE_ASUSP535) +#else +# define machine_is_asusp535() (0) +#endif + +#ifdef CONFIG_MACH_HTCRAPHAEL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCRAPHAEL +# endif +# define machine_is_htcraphael() (machine_arch_type == MACH_TYPE_HTCRAPHAEL) +#else +# define machine_is_htcraphael() (0) +#endif + +#ifdef CONFIG_MACH_SYGDG1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SYGDG1 +# endif +# define machine_is_sygdg1() (machine_arch_type == MACH_TYPE_SYGDG1) +#else +# define machine_is_sygdg1() (0) +#endif + +#ifdef CONFIG_MACH_SYGDG2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SYGDG2 +# endif +# define machine_is_sygdg2() (machine_arch_type == MACH_TYPE_SYGDG2) +#else +# define machine_is_sygdg2() (0) +#endif + +#ifdef CONFIG_MACH_SEOUL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SEOUL +# endif +# define machine_is_seoul() (machine_arch_type == MACH_TYPE_SEOUL) +#else +# define machine_is_seoul() (0) +#endif + +#ifdef CONFIG_MACH_SALERNO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SALERNO +# endif +# define machine_is_salerno() (machine_arch_type == MACH_TYPE_SALERNO) +#else +# define machine_is_salerno() (0) +#endif + +#ifdef CONFIG_MACH_UCN_S3C64XX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UCN_S3C64XX +# endif +# define machine_is_ucn_s3c64xx() (machine_arch_type == MACH_TYPE_UCN_S3C64XX) +#else +# define machine_is_ucn_s3c64xx() (0) +#endif + +#ifdef CONFIG_MACH_MSM7201A +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM7201A +# endif +# define machine_is_msm7201a() (machine_arch_type == MACH_TYPE_MSM7201A) +#else +# define machine_is_msm7201a() (0) +#endif + +#ifdef CONFIG_MACH_LPR1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LPR1 +# endif +# define machine_is_lpr1() (machine_arch_type == MACH_TYPE_LPR1) +#else +# define machine_is_lpr1() (0) +#endif + +#ifdef CONFIG_MACH_ARMADILLO500FX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ARMADILLO500FX +# endif +# define machine_is_armadillo500fx() (machine_arch_type == MACH_TYPE_ARMADILLO500FX) +#else +# define machine_is_armadillo500fx() (0) +#endif + +#ifdef CONFIG_MACH_G3EVM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_G3EVM +# endif +# define machine_is_g3evm() (machine_arch_type == MACH_TYPE_G3EVM) +#else +# define machine_is_g3evm() (0) +#endif + +#ifdef CONFIG_MACH_Z3_DM355 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_Z3_DM355 +# endif +# define machine_is_z3_dm355() (machine_arch_type == MACH_TYPE_Z3_DM355) +#else +# define machine_is_z3_dm355() (0) +#endif + +#ifdef CONFIG_MACH_W90P910EVB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_W90P910EVB +# endif +# define machine_is_w90p910evb() (machine_arch_type == MACH_TYPE_W90P910EVB) +#else +# define machine_is_w90p910evb() (0) +#endif + +#ifdef CONFIG_MACH_W90P920EVB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_W90P920EVB +# endif +# define machine_is_w90p920evb() (machine_arch_type == MACH_TYPE_W90P920EVB) +#else +# define machine_is_w90p920evb() (0) +#endif + +#ifdef CONFIG_MACH_W90P950EVB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_W90P950EVB +# endif +# define machine_is_w90p950evb() (machine_arch_type == MACH_TYPE_W90P950EVB) +#else +# define machine_is_w90p950evb() (0) +#endif + +#ifdef CONFIG_MACH_W90N960EVB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_W90N960EVB +# endif +# define machine_is_w90n960evb() (machine_arch_type == MACH_TYPE_W90N960EVB) +#else +# define machine_is_w90n960evb() (0) +#endif + +#ifdef CONFIG_MACH_CAMHD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CAMHD +# endif +# define machine_is_camhd() (machine_arch_type == MACH_TYPE_CAMHD) +#else +# define machine_is_camhd() (0) +#endif + +#ifdef CONFIG_MACH_MVC100 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MVC100 +# endif +# define machine_is_mvc100() (machine_arch_type == MACH_TYPE_MVC100) +#else +# define machine_is_mvc100() (0) +#endif + +#ifdef CONFIG_MACH_ELECTRUM_200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ELECTRUM_200 +# endif +# define machine_is_electrum_200() (machine_arch_type == MACH_TYPE_ELECTRUM_200) +#else +# define machine_is_electrum_200() (0) +#endif + +#ifdef CONFIG_MACH_HTCJADE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCJADE +# endif +# define machine_is_htcjade() (machine_arch_type == MACH_TYPE_HTCJADE) +#else +# define machine_is_htcjade() (0) +#endif + +#ifdef CONFIG_MACH_MEMPHIS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MEMPHIS +# endif +# define machine_is_memphis() (machine_arch_type == MACH_TYPE_MEMPHIS) +#else +# define machine_is_memphis() (0) +#endif + +#ifdef CONFIG_MACH_IMX27SBC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IMX27SBC +# endif +# define machine_is_imx27sbc() (machine_arch_type == MACH_TYPE_IMX27SBC) +#else +# define machine_is_imx27sbc() (0) +#endif + +#ifdef CONFIG_MACH_LEXTAR +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LEXTAR +# endif +# define machine_is_lextar() (machine_arch_type == MACH_TYPE_LEXTAR) +#else +# define machine_is_lextar() (0) +#endif + +#ifdef CONFIG_MACH_MV88F6281GTW_GE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MV88F6281GTW_GE +# endif +# define machine_is_mv88f6281gtw_ge() (machine_arch_type == MACH_TYPE_MV88F6281GTW_GE) +#else +# define machine_is_mv88f6281gtw_ge() (0) +#endif + +#ifdef CONFIG_MACH_NCP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NCP +# endif +# define machine_is_ncp() (machine_arch_type == MACH_TYPE_NCP) +#else +# define machine_is_ncp() (0) +#endif + +#ifdef CONFIG_MACH_Z32AN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_Z32AN +# endif +# define machine_is_z32an_series() (machine_arch_type == MACH_TYPE_Z32AN) +#else +# define machine_is_z32an_series() (0) +#endif + +#ifdef CONFIG_MACH_TMQ_CAPD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TMQ_CAPD +# endif +# define machine_is_tmq_capd() (machine_arch_type == MACH_TYPE_TMQ_CAPD) +#else +# define machine_is_tmq_capd() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3_WL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3_WL +# endif +# define machine_is_omap3_wl() (machine_arch_type == MACH_TYPE_OMAP3_WL) +#else +# define machine_is_omap3_wl() (0) +#endif + +#ifdef CONFIG_MACH_CHUMBY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CHUMBY +# endif +# define machine_is_chumby() (machine_arch_type == MACH_TYPE_CHUMBY) +#else +# define machine_is_chumby() (0) +#endif + +#ifdef CONFIG_MACH_ATSARM9 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ATSARM9 +# endif +# define machine_is_atsarm9() (machine_arch_type == MACH_TYPE_ATSARM9) +#else +# define machine_is_atsarm9() (0) +#endif + +#ifdef CONFIG_MACH_DAVINCI_DM365_EVM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DAVINCI_DM365_EVM +# endif +# define machine_is_davinci_dm365_evm() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_EVM) +#else +# define machine_is_davinci_dm365_evm() (0) +#endif + +#ifdef CONFIG_MACH_BAHAMAS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BAHAMAS +# endif +# define machine_is_bahamas() (machine_arch_type == MACH_TYPE_BAHAMAS) +#else +# define machine_is_bahamas() (0) +#endif + +#ifdef CONFIG_MACH_DAS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DAS +# endif +# define machine_is_das() (machine_arch_type == MACH_TYPE_DAS) +#else +# define machine_is_das() (0) +#endif + +#ifdef CONFIG_MACH_MINIDAS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MINIDAS +# endif +# define machine_is_minidas() (machine_arch_type == MACH_TYPE_MINIDAS) +#else +# define machine_is_minidas() (0) +#endif + +#ifdef CONFIG_MACH_VK1000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VK1000 +# endif +# define machine_is_vk1000() (machine_arch_type == MACH_TYPE_VK1000) +#else +# define machine_is_vk1000() (0) +#endif + +#ifdef CONFIG_MACH_CENTRO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CENTRO +# endif +# define machine_is_centro() (machine_arch_type == MACH_TYPE_CENTRO) +#else +# define machine_is_centro() (0) +#endif + +#ifdef CONFIG_MACH_CTERA_2BAY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CTERA_2BAY +# endif +# define machine_is_ctera_2bay() (machine_arch_type == MACH_TYPE_CTERA_2BAY) +#else +# define machine_is_ctera_2bay() (0) +#endif + +#ifdef CONFIG_MACH_EDGECONNECT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EDGECONNECT +# endif +# define machine_is_edgeconnect() (machine_arch_type == MACH_TYPE_EDGECONNECT) +#else +# define machine_is_edgeconnect() (0) +#endif + +#ifdef CONFIG_MACH_ND27000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ND27000 +# endif +# define machine_is_nd27000() (machine_arch_type == MACH_TYPE_ND27000) +#else +# define machine_is_nd27000() (0) +#endif + +#ifdef CONFIG_MACH_GEMALTO_COBRA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GEMALTO_COBRA +# endif +# define machine_is_cobra() (machine_arch_type == MACH_TYPE_GEMALTO_COBRA) +#else +# define machine_is_cobra() (0) +#endif + +#ifdef CONFIG_MACH_INGELABS_COMET +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_INGELABS_COMET +# endif +# define machine_is_ingelabs_comet() (machine_arch_type == MACH_TYPE_INGELABS_COMET) +#else +# define machine_is_ingelabs_comet() (0) +#endif + +#ifdef CONFIG_MACH_POLLUX_WIZ +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_POLLUX_WIZ +# endif +# define machine_is_pollux_wiz() (machine_arch_type == MACH_TYPE_POLLUX_WIZ) +#else +# define machine_is_pollux_wiz() (0) +#endif + +#ifdef CONFIG_MACH_BLACKSTONE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BLACKSTONE +# endif +# define machine_is_blackstone() (machine_arch_type == MACH_TYPE_BLACKSTONE) +#else +# define machine_is_blackstone() (0) +#endif + +#ifdef CONFIG_MACH_TOPAZ +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TOPAZ +# endif +# define machine_is_topaz() (machine_arch_type == MACH_TYPE_TOPAZ) +#else +# define machine_is_topaz() (0) +#endif + +#ifdef CONFIG_MACH_AIXLE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AIXLE +# endif +# define machine_is_aixle() (machine_arch_type == MACH_TYPE_AIXLE) +#else +# define machine_is_aixle() (0) +#endif + +#ifdef CONFIG_MACH_MW998 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MW998 +# endif +# define machine_is_mw998() (machine_arch_type == MACH_TYPE_MW998) +#else +# define machine_is_mw998() (0) +#endif + +#ifdef CONFIG_MACH_NOKIA_RX51 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NOKIA_RX51 +# endif +# define machine_is_nokia_rx51() (machine_arch_type == MACH_TYPE_NOKIA_RX51) +#else +# define machine_is_nokia_rx51() (0) +#endif + +#ifdef CONFIG_MACH_VSC5605EV +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VSC5605EV +# endif +# define machine_is_vsc5605ev() (machine_arch_type == MACH_TYPE_VSC5605EV) +#else +# define machine_is_vsc5605ev() (0) +#endif + +#ifdef CONFIG_MACH_NT98700DK +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NT98700DK +# endif +# define machine_is_nt98700dk() (machine_arch_type == MACH_TYPE_NT98700DK) +#else +# define machine_is_nt98700dk() (0) +#endif + +#ifdef CONFIG_MACH_ICONTACT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ICONTACT +# endif +# define machine_is_icontact() (machine_arch_type == MACH_TYPE_ICONTACT) +#else +# define machine_is_icontact() (0) +#endif + +#ifdef CONFIG_MACH_SWARCO_FRCPU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SWARCO_FRCPU +# endif +# define machine_is_swarco_frcpu() (machine_arch_type == MACH_TYPE_SWARCO_FRCPU) +#else +# define machine_is_swarco_frcpu() (0) +#endif + +#ifdef CONFIG_MACH_SWARCO_SCPU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SWARCO_SCPU +# endif +# define machine_is_swarco_scpu() (machine_arch_type == MACH_TYPE_SWARCO_SCPU) +#else +# define machine_is_swarco_scpu() (0) +#endif + +#ifdef CONFIG_MACH_BBOX_P16 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BBOX_P16 +# endif +# define machine_is_bbox_p16() (machine_arch_type == MACH_TYPE_BBOX_P16) +#else +# define machine_is_bbox_p16() (0) +#endif + +#ifdef CONFIG_MACH_BSTD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BSTD +# endif +# define machine_is_bstd() (machine_arch_type == MACH_TYPE_BSTD) +#else +# define machine_is_bstd() (0) +#endif + +#ifdef CONFIG_MACH_SBC2440II +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBC2440II +# endif +# define machine_is_sbc2440ii() (machine_arch_type == MACH_TYPE_SBC2440II) +#else +# define machine_is_sbc2440ii() (0) +#endif + +#ifdef CONFIG_MACH_PCM034 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PCM034 +# endif +# define machine_is_pcm034() (machine_arch_type == MACH_TYPE_PCM034) +#else +# define machine_is_pcm034() (0) +#endif + +#ifdef CONFIG_MACH_NESO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NESO +# endif +# define machine_is_neso() (machine_arch_type == MACH_TYPE_NESO) +#else +# define machine_is_neso() (0) +#endif + +#ifdef CONFIG_MACH_WLNX_9G20 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_WLNX_9G20 +# endif +# define machine_is_wlnx_9g20() (machine_arch_type == MACH_TYPE_WLNX_9G20) +#else +# define machine_is_wlnx_9g20() (0) +#endif + +#ifdef CONFIG_MACH_OMAP_ZOOM2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP_ZOOM2 +# endif +# define machine_is_omap_zoom2() (machine_arch_type == MACH_TYPE_OMAP_ZOOM2) +#else +# define machine_is_omap_zoom2() (0) +#endif + +#ifdef CONFIG_MACH_TOTEMNOVA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TOTEMNOVA +# endif +# define machine_is_totemnova() (machine_arch_type == MACH_TYPE_TOTEMNOVA) +#else +# define machine_is_totemnova() (0) +#endif + +#ifdef CONFIG_MACH_C5000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_C5000 +# endif +# define machine_is_c5000() (machine_arch_type == MACH_TYPE_C5000) +#else +# define machine_is_c5000() (0) +#endif + +#ifdef CONFIG_MACH_UNIPO_AT91SAM9263 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_UNIPO_AT91SAM9263 +# endif +# define machine_is_unipo_at91sam9263() (machine_arch_type == MACH_TYPE_UNIPO_AT91SAM9263) +#else +# define machine_is_unipo_at91sam9263() (0) +#endif + +#ifdef CONFIG_MACH_ETHERNUT5 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ETHERNUT5 +# endif +# define machine_is_ethernut5() (machine_arch_type == MACH_TYPE_ETHERNUT5) +#else +# define machine_is_ethernut5() (0) +#endif + +#ifdef CONFIG_MACH_ARM11 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ARM11 +# endif +# define machine_is_arm11() (machine_arch_type == MACH_TYPE_ARM11) +#else +# define machine_is_arm11() (0) +#endif + +#ifdef CONFIG_MACH_CPUAT9260 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CPUAT9260 +# endif +# define machine_is_cpuat9260() (machine_arch_type == MACH_TYPE_CPUAT9260) +#else +# define machine_is_cpuat9260() (0) +#endif + +#ifdef CONFIG_MACH_CPUPXA255 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CPUPXA255 +# endif +# define machine_is_cpupxa255() (machine_arch_type == MACH_TYPE_CPUPXA255) +#else +# define machine_is_cpupxa255() (0) +#endif + +#ifdef CONFIG_MACH_CPUIMX27 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CPUIMX27 +# endif +# define machine_is_cpuimx27() (machine_arch_type == MACH_TYPE_CPUIMX27) +#else +# define machine_is_cpuimx27() (0) +#endif + +#ifdef CONFIG_MACH_CHEFLUX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CHEFLUX +# endif +# define machine_is_cheflux() (machine_arch_type == MACH_TYPE_CHEFLUX) +#else +# define machine_is_cheflux() (0) +#endif + +#ifdef CONFIG_MACH_EB_CPUX9K2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EB_CPUX9K2 +# endif +# define machine_is_eb_cpux9k2() (machine_arch_type == MACH_TYPE_EB_CPUX9K2) +#else +# define machine_is_eb_cpux9k2() (0) +#endif + +#ifdef CONFIG_MACH_OPCOTEC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OPCOTEC +# endif +# define machine_is_opcotec() (machine_arch_type == MACH_TYPE_OPCOTEC) +#else +# define machine_is_opcotec() (0) +#endif + +#ifdef CONFIG_MACH_YT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_YT +# endif +# define machine_is_yt() (machine_arch_type == MACH_TYPE_YT) +#else +# define machine_is_yt() (0) +#endif + +#ifdef CONFIG_MACH_MOTOQ +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MOTOQ +# endif +# define machine_is_motoq() (machine_arch_type == MACH_TYPE_MOTOQ) +#else +# define machine_is_motoq() (0) +#endif + +#ifdef CONFIG_MACH_BSB1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BSB1 +# endif +# define machine_is_bsb1() (machine_arch_type == MACH_TYPE_BSB1) +#else +# define machine_is_bsb1() (0) +#endif + +#ifdef CONFIG_MACH_ACS5K +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ACS5K +# endif +# define machine_is_acs5k() (machine_arch_type == MACH_TYPE_ACS5K) +#else +# define machine_is_acs5k() (0) +#endif + +#ifdef CONFIG_MACH_MILAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MILAN +# endif +# define machine_is_milan() (machine_arch_type == MACH_TYPE_MILAN) +#else +# define machine_is_milan() (0) +#endif + +#ifdef CONFIG_MACH_QUARTZV2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_QUARTZV2 +# endif +# define machine_is_quartzv2() (machine_arch_type == MACH_TYPE_QUARTZV2) +#else +# define machine_is_quartzv2() (0) +#endif + +#ifdef CONFIG_MACH_RSVP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RSVP +# endif +# define machine_is_rsvp() (machine_arch_type == MACH_TYPE_RSVP) +#else +# define machine_is_rsvp() (0) +#endif + +#ifdef CONFIG_MACH_RMP200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RMP200 +# endif +# define machine_is_rmp200() (machine_arch_type == MACH_TYPE_RMP200) +#else +# define machine_is_rmp200() (0) +#endif + +#ifdef CONFIG_MACH_SNAPPER_9260 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SNAPPER_9260 +# endif +# define machine_is_snapper_9260() (machine_arch_type == MACH_TYPE_SNAPPER_9260) +#else +# define machine_is_snapper_9260() (0) +#endif + +#ifdef CONFIG_MACH_DSM320 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DSM320 +# endif +# define machine_is_dsm320() (machine_arch_type == MACH_TYPE_DSM320) +#else +# define machine_is_dsm320() (0) +#endif + +#ifdef CONFIG_MACH_ADSGCM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ADSGCM +# endif +# define machine_is_adsgcm() (machine_arch_type == MACH_TYPE_ADSGCM) +#else +# define machine_is_adsgcm() (0) +#endif + +#ifdef CONFIG_MACH_ASE2_400 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ASE2_400 +# endif +# define machine_is_ase2_400() (machine_arch_type == MACH_TYPE_ASE2_400) +#else +# define machine_is_ase2_400() (0) +#endif + +#ifdef CONFIG_MACH_PIZZA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PIZZA +# endif +# define machine_is_pizza() (machine_arch_type == MACH_TYPE_PIZZA) +#else +# define machine_is_pizza() (0) +#endif + +#ifdef CONFIG_MACH_SPOT_NGPL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SPOT_NGPL +# endif +# define machine_is_spot_ngpl() (machine_arch_type == MACH_TYPE_SPOT_NGPL) +#else +# define machine_is_spot_ngpl() (0) +#endif + +#ifdef CONFIG_MACH_ARMATA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ARMATA +# endif +# define machine_is_armata() (machine_arch_type == MACH_TYPE_ARMATA) +#else +# define machine_is_armata() (0) +#endif + +#ifdef CONFIG_MACH_EXEDA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EXEDA +# endif +# define machine_is_exeda() (machine_arch_type == MACH_TYPE_EXEDA) +#else +# define machine_is_exeda() (0) +#endif + +#ifdef CONFIG_MACH_MX31SF005 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX31SF005 +# endif +# define machine_is_mx31sf005() (machine_arch_type == MACH_TYPE_MX31SF005) +#else +# define machine_is_mx31sf005() (0) +#endif + +#ifdef CONFIG_MACH_F5D8231_4_V2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_F5D8231_4_V2 +# endif +# define machine_is_f5d8231_4_v2() (machine_arch_type == MACH_TYPE_F5D8231_4_V2) +#else +# define machine_is_f5d8231_4_v2() (0) +#endif + +#ifdef CONFIG_MACH_Q2440 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_Q2440 +# endif +# define machine_is_q2440() (machine_arch_type == MACH_TYPE_Q2440) +#else +# define machine_is_q2440() (0) +#endif + +#ifdef CONFIG_MACH_QQ2440 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_QQ2440 +# endif +# define machine_is_qq2440() (machine_arch_type == MACH_TYPE_QQ2440) +#else +# define machine_is_qq2440() (0) +#endif + +#ifdef CONFIG_MACH_MINI2440 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MINI2440 +# endif +# define machine_is_mini2440() (machine_arch_type == MACH_TYPE_MINI2440) +#else +# define machine_is_mini2440() (0) +#endif + +#ifdef CONFIG_MACH_COLIBRI300 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_COLIBRI300 +# endif +# define machine_is_colibri300() (machine_arch_type == MACH_TYPE_COLIBRI300) +#else +# define machine_is_colibri300() (0) +#endif + +#ifdef CONFIG_MACH_JADES +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_JADES +# endif +# define machine_is_jades() (machine_arch_type == MACH_TYPE_JADES) +#else +# define machine_is_jades() (0) +#endif + +#ifdef CONFIG_MACH_SPARK +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SPARK +# endif +# define machine_is_spark() (machine_arch_type == MACH_TYPE_SPARK) +#else +# define machine_is_spark() (0) +#endif + +#ifdef CONFIG_MACH_BENZINA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BENZINA +# endif +# define machine_is_benzina() (machine_arch_type == MACH_TYPE_BENZINA) +#else +# define machine_is_benzina() (0) +#endif + +#ifdef CONFIG_MACH_BLAZE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BLAZE +# endif +# define machine_is_blaze() (machine_arch_type == MACH_TYPE_BLAZE) +#else +# define machine_is_blaze() (0) +#endif + +#ifdef CONFIG_MACH_LINKSTATION_LS_HGL +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LINKSTATION_LS_HGL +# endif +# define machine_is_linkstation_ls_hgl() (machine_arch_type == MACH_TYPE_LINKSTATION_LS_HGL) +#else +# define machine_is_linkstation_ls_hgl() (0) +#endif + +#ifdef CONFIG_MACH_HTCVENUS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCVENUS +# endif +# define machine_is_htcvenus() (machine_arch_type == MACH_TYPE_HTCVENUS) +#else +# define machine_is_htcvenus() (0) +#endif + /* * These have not yet been registered */ diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 031186d..025012a 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -118,7 +118,7 @@ static inline void set_io_port_base(unsigned long base) * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/MIPS mapping */ -extern inline phys_addr_t virt_to_phys(void * address) +extern inline phys_addr_t virt_to_phys(volatile void * address) { return CPHYSADDR(address); } diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h index 223269f..8934d51 100644 --- a/include/configs/TQM823L.h +++ b/include/configs/TQM823L.h @@ -123,6 +123,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h index aed5d5b..fd41573 100644 --- a/include/configs/TQM823M.h +++ b/include/configs/TQM823M.h @@ -121,6 +121,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h index 4aa8db8..77eb5a9 100644 --- a/include/configs/TQM850L.h +++ b/include/configs/TQM850L.h @@ -112,6 +112,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h index ce5dcc1..bb8825b 100644 --- a/include/configs/TQM850M.h +++ b/include/configs/TQM850M.h @@ -110,6 +110,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h index 012e203..2ccbaf8 100644 --- a/include/configs/TQM855L.h +++ b/include/configs/TQM855L.h @@ -116,6 +116,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h index 84889ea..8a65183 100644 --- a/include/configs/TQM855M.h +++ b/include/configs/TQM855M.h @@ -149,6 +149,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_EEPROM #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h index b67cdcd..8bd1fe0 100644 --- a/include/configs/TQM860L.h +++ b/include/configs/TQM860L.h @@ -116,6 +116,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index 46852dd..ad2c71c 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -116,6 +116,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index a7fcb1a..0a5180e 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -119,6 +119,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index bcf37d9..ee6980c 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -119,6 +119,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 87dc264..421a2d8 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -160,6 +160,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h index 942bbf6..4c80bad 100644 --- a/include/configs/TQM885D.h +++ b/include/configs/TQM885D.h @@ -157,6 +157,7 @@ #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_I2C #define CONFIG_CMD_IDE #define CONFIG_CMD_MII diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 27567fa..f6399a9 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -308,8 +308,8 @@ */ #define CONFIG_HARD_I2C 1 #define CONFIG_BFIN_TWI_I2C 1 -#define CFG_I2C_SPEED 50000 -#define CFG_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 #define CONFIG_EBIU_SDRRC_VAL 0x306 #define CONFIG_EBIU_SDGCTL_VAL 0x91114d diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index 71e5b58..f19374e 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -117,7 +117,7 @@ #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 400/200/100 MHz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/cradle.h b/include/configs/cradle.h index e80504a..5131175 100644 --- a/include/configs/cradle.h +++ b/include/configs/cradle.h @@ -103,7 +103,7 @@ #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ /* valid baudrates */ diff --git a/include/configs/csb226.h b/include/configs/csb226.h index 1563528..d65c14a 100644 --- a/include/configs/csb226.h +++ b/include/configs/csb226.h @@ -131,7 +131,7 @@ /* RS: is this where U-Boot is */ /* RS: relocated to in RAM? */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 /* RS: the oscillator is actually 3680130?? */ #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ /* 0101000001 */ diff --git a/include/configs/delta.h b/include/configs/delta.h index 8cbeb9a..001b48a 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -34,7 +34,6 @@ #ifdef CONFIG_LCD #define CONFIG_SHARP_LM8V31 #endif -/* #define CONFIG_MMC 1 */ #define BOARD_LATE_INIT 1 #undef CONFIG_SKIP_RELOCATE_UBOOT @@ -171,7 +170,7 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ -#define CONFIG_SYS_HZ 3250000 /* incrementer freq: 3.25 MHz */ +#define CONFIG_SYS_HZ 1000 /* Monahans Core Frequency */ #define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */ @@ -181,7 +180,11 @@ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -/* #define CONFIG_SYS_MMC_BASE 0xF0000000 */ +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SYS_MMC_BASE 0xF0000000 +#endif /* * Stack sizes diff --git a/include/configs/innokom.h b/include/configs/innokom.h index 45e22bf..d9b1555 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -119,7 +119,7 @@ #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* load kernel to this address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 /* RS: the oscillator is actually 3680130?? */ #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ diff --git a/include/configs/logodl.h b/include/configs/logodl.h index 8644cb0..cd105da 100644 --- a/include/configs/logodl.h +++ b/include/configs/logodl.h @@ -112,7 +112,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 /* RS: the oscillator is actually 3680130?? */ #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 208910e..69774d7 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -40,7 +40,7 @@ #ifdef CONFIG_LCD #define CONFIG_SHARP_LM8V31 #endif -#define CONFIG_MMC 1 +#define CONFIG_MMC #define BOARD_LATE_INIT 1 #define CONFIG_DOS_PARTITION @@ -83,7 +83,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_MMC #define CONFIG_CMD_FAT @@ -127,13 +126,17 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC #define CONFIG_SYS_MMC_BASE 0xF0000000 +#endif /* * Stack sizes diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index b5d12c6..79c7050 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -32,6 +32,7 @@ #define CONFIG_MPC8247 1 #define CONFIG_MPC8272_FAMILY 1 #define CONFIG_MGCOGE 1 +#define CONFIG_HOSTNAME mgcoge #define CONFIG_CPM2 1 /* Has a CPM2 */ @@ -49,6 +50,8 @@ #undef CONFIG_CONS_ON_SCC /* It's not on SCC */ #undef CONFIG_CONS_NONE /* It's not on external UART */ #define CONFIG_CONS_INDEX 2 /* SMC2 is used for console */ +#define CONFIG_SYS_SMC_RXBUFLEN 128 +#define CONFIG_SYS_MAXIDLE 10 /* * Select ethernet configuration @@ -75,6 +78,14 @@ #define CONFIG_8260_CLKIN 66000000 /* in Hz */ #endif +#define BOOTFLASH_START FE000000 +#define CONFIG_PRAM 512 /* protected RAM [KBytes] */ + +#define MTDIDS_DEFAULT "nor0=boot,nor1=app" +#define MTDPARTS_DEFAULT \ + "mtdparts=boot:384k(u-boot),128k(env),128k(envred),3456k(free);" \ + "app:3m(esw0),10m(rootfs0),3m(esw1),10m(rootfs1),1m(var),5m(cfg)" + /* * Default environment settings */ @@ -107,6 +118,8 @@ "tftp ${ramdisk_addr} ${ramdisk_file}; " \ "run ramargs addip; " \ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "EEprom_ivm=pca9544a:70:4 \0" \ + "mtdparts=" MK_STR(MTDPARTS_DEFAULT) "\0" \ "" #define CONFIG_SYS_SDRAM_BASE 0x00000000 @@ -127,12 +140,12 @@ #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256KB for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384KB for Monitor */ #define CONFIG_ENV_IS_IN_FLASH #ifdef CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x4000 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN @@ -140,6 +153,7 @@ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #endif /* CONFIG_ENV_IS_IN_FLASH */ +#define CONFIG_ENV_BUFFER_PRINT 1 /* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ @@ -187,6 +201,8 @@ #define CONFIG_SYS_DTT_HYSTERESIS 3 #define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + #define CONFIG_SYS_IMMR 0xF0000000 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR @@ -333,6 +349,18 @@ ORxG_CSNT | ORxG_ACS_DIV2 |\ ORxG_SCY_3_CLK | ORxG_TRLX ) +/* Board FPGA on CS4 initialization values +*/ +#define CONFIG_SYS_FPGA_BASE 0x40000000 +#define CONFIG_SYS_FPGA_SIZE 1 /*1KB*/ + +#define CONFIG_SYS_BR4_PRELIM ((CONFIG_SYS_FPGA_BASE & BRx_BA_MSK) |\ + BRx_PS_8 | BRx_MS_GPCM_P | BRx_V) + +#define CONFIG_SYS_OR4_PRELIM (P2SZ_TO_AM(CONFIG_SYS_FPGA_SIZE << 10) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_3_CLK | ORxG_TRLX ) + /* CFG-Flash on CS5 initialization values */ #define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_FLASH_BASE_1 & BRx_BA_MSK) |\ diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h index f53b6d3..4623e4c 100644 --- a/include/configs/mgsuvd.h +++ b/include/configs/mgsuvd.h @@ -35,6 +35,7 @@ #define CONFIG_MPC866 1 /* This is a MPC866 CPU */ #define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */ +#define CONFIG_HOSTNAME mgsuvd /* include common defines/options for all Keymile boards */ #include "keymile-common.h" @@ -44,10 +45,15 @@ #define CONFIG_SYS_SMC_UCODE_PATCH 1 /* Relocate SMC1 */ #define CONFIG_SYS_SMC_DPMEM_OFFSET 0x1fc0 #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ +#define CONFIG_SYS_SMC_RXBUFLEN 128 +#define CONFIG_SYS_MAXIDLE 10 #define CONFIG_SYS_CPM_BOOTCOUNT_ADDR 0x1eb0 /* In case of SMC relocation, the * default value is not working */ +#define BOOTFLASH_START F0000000 +#define CONFIG_PRAM 512 /* protected RAM [KBytes] */ + #define CONFIG_PREBOOT "echo;" \ "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ "echo" @@ -110,7 +116,7 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_FLASH_BASE 0xf0000000 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ +#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ @@ -135,13 +141,14 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */ -#define CONFIG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN +#define CONFIG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */ #define CONFIG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) +#define CONFIG_ENV_BUFFER_PRINT 1 /*----------------------------------------------------------------------- * Cache Configuration @@ -324,4 +331,9 @@ #define CONFIG_SYS_DTT_HYSTERESIS 3 #define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) +#define MTDIDS_DEFAULT "nor0=app" +#define MTDPARTS_DEFAULT ( \ + "mtdparts=app:384k(u-boot),128k(env),128k(envred),128k(free)," \ + "1536k(esw0),8704k(rootfs0),1536k(esw1),2432k(rootfs1),640k(var),768k(cfg)") + #endif /* __CONFIG_H */ diff --git a/include/configs/nmdk8815.h b/include/configs/nmdk8815.h index 01de08f..543780d 100644 --- a/include/configs/nmdk8815.h +++ b/include/configs/nmdk8815.h @@ -25,6 +25,8 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include <nomadik.h> + #define CONFIG_ARM926EJS #define CONFIG_NOMADIK #define CONFIG_NOMADIK_8815 @@ -35,12 +37,18 @@ /* commands */ #include <config_cmd_default.h> + +#define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -/* At this point there is no flash driver, so remove some commands */ -#undef CONFIG_CMD_ENV +#define CONFIG_CMD_NFS +/* There is no NOR flash, so undefine these commands */ #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS +#define CONFIG_SYS_NO_FLASH +/* There is NAND storage */ +#define CONFIG_NAND_NOMADIK +#define CONFIG_CMD_JFFS2 /* user interface */ #define CONFIG_SYS_LONGHELP @@ -118,13 +126,11 @@ #define CONFIG_MTD_ONENAND_VERIFY_WRITE #define CONFIG_SYS_ONENAND_BASE 0x30000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 - -#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_NAND_BASE 0x40000000 /* SMPS0n */ #ifdef CONFIG_BOOT_ONENAND -# undef CONFIG_CMD_NAND /* Temporary: nand and onenand can't coexist */ +# define CONFIG_CMD_ONENAND /* Temporary: nand and onenand can't coexist */ /* Partition Size Start * XloaderTOC + X-Loader 256KB 0x00000000 * Memory init function 256KB 0x00040000 @@ -142,7 +148,7 @@ #else /* ! CONFIG_BOOT_ONENAND */ -# undef CONFIG_CMD_ONENAND /* Temporary: nand and onenand can't coexist */ +# define CONFIG_CMD_NAND /* Temporary: nand and onenand can't coexist */ # define CONFIG_JFFS2_DEV "nand0" # define CONFIG_JFFS2_NAND 1 /* For the jffs2 support*/ @@ -150,39 +156,13 @@ # define CONFIG_JFFS2_PART_OFFSET 0x00280000 # define CONFIG_ENV_IS_IN_NAND -# define CONFIG_ENV_SIZE 0x20000 /*128 Kb*/ +# define CONFIG_ENV_SIZE 0x20000 /* 128 Kb - one sector */ # define CONFIG_ENV_OFFSET (0x8000000 - CONFIG_ENV_SIZE) #endif /* CONFIG_BOOT_ONENAND */ -/* Temporarily, until we have no driver, env is not in nand */ -#undef CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_IS_NOWHERE - /* this is needed to make hello_world.c and other stuff happy */ #define CONFIG_SYS_MAX_FLASH_SECT 512 #define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* base addresses of our peripherals */ -#define NOMADIK_SRC_BASE 0x101E0000 /* System and Reset Cnt */ -#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */ -#define NOMADIK_MPMC_BASE 0x10110000 /* SDRAM Controller */ -#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC Controller */ -#define NOMADIK_1NAND_BASE 0x30000000 -#define NOMADIK_GPIO0_BASE 0x101E4000 -#define NOMADIK_GPIO1_BASE 0x101E5000 -#define NOMADIK_GPIO2_BASE 0x101E6000 -#define NOMADIK_GPIO3_BASE 0x101E7000 -#define NOMADIK_CPLD_BASE 0x36000000 -#define NOMADIK_UART0_BASE 0x101FD000 -#define NOMADIK_UART1_BASE 0x101FB000 -#define NOMADIK_UART2_BASE 0x101F2000 - -#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */ -#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */ - -#define NOMADIK_RTC_BASE 0x101E8000 -#define NOMADIK_ETH0_BASE 0x36800300 -#define NOMADIK_CPLD_UART_BASE 0x36480000 - #endif /* __CONFIG_H */ diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h index 14f8917..59741a9 100644 --- a/include/configs/pleb2.h +++ b/include/configs/pleb2.h @@ -126,12 +126,17 @@ #define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC +#endif + /* * Stack sizes * diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index f81103b..d1c2c65 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -119,7 +119,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_DHCP @@ -241,7 +240,7 @@ #define CONFIG_SYS_LOAD_ADDR 0xa0800000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */ #define RTC 1 /* enable 32KHz osc */ @@ -249,7 +248,11 @@ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC #define CONFIG_SYS_MMC_BASE 0xF0000000 +#endif /* * Stack sizes diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index 0a8e994..70e5ce9 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -79,7 +79,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_IMLS #define CONFIG_CMD_PING @@ -168,13 +167,17 @@ #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC #define CONFIG_SYS_MMC_BASE 0xF0000000 +#endif /* * Stack sizes diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h index 38b0a4e..7b61c82 100644 --- a/include/configs/virtlab2.h +++ b/include/configs/virtlab2.h @@ -117,6 +117,7 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NFS diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h index b70a531..d0afd29 100644 --- a/include/configs/wepep250.h +++ b/include/configs/wepep250.h @@ -81,7 +81,7 @@ #undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 324f03e..250247c 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -138,7 +138,7 @@ #define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 400/200/100 MHz */ /* diff --git a/include/configs/xm250.h b/include/configs/xm250.h index 16af845..8e9d5ab 100644 --- a/include/configs/xm250.h +++ b/include/configs/xm250.h @@ -121,7 +121,7 @@ #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/400/100 MHz */ /* valid baudrates */ diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index b727413..6761438 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -35,10 +35,7 @@ #define CONFIG_DOS_PARTITION 1 #define BOARD_LATE_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ - -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ @@ -118,7 +115,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_MMC #define CONFIG_CMD_FAT #define CONFIG_CMD_PING #define CONFIG_CMD_JFFS2 @@ -145,9 +141,14 @@ #define CONFIG_SYS_MEMTEST_END 0xA0800000 /* 4 ... 8 MB in DRAM */ #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */ -#define CONFIG_SYS_MMC_BASE 0xF0000000 #define CONFIG_SYS_LOAD_ADDR 0xA0000000 /* load kernel to this address */ +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SYS_MMC_BASE 0xF0000000 +#endif + /* Stack sizes - The stack sizes are set up in start.S using the settings below */ #define CONFIG_STACKSIZE (128*1024) /* regular stack */ #ifdef CONFIG_USE_IRQ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 31ea4ca..6febeea 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -41,7 +41,7 @@ #ifdef CONFIG_LCD #define CONFIG_SHARP_LM8V31 #endif -/* #define CONFIG_MMC 1 */ +#undef CONFIG_MMC #define BOARD_LATE_INIT 1 #undef CONFIG_SKIP_RELOCATE_UBOOT @@ -143,7 +143,7 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */ -#define CONFIG_SYS_HZ 3250000 /* incrementer freq: 3.25 MHz */ +#define CONFIG_SYS_HZ 1000 /* Monahans Core Frequency */ #define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */ @@ -152,7 +152,11 @@ /* valid baudrates */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -/* #define CONFIG_SYS_MMC_BASE 0xF0000000 */ +#ifdef CONFIG_MMC +#define CONFIG_PXA_MMC +#define CONFIG_CMD_MMC +#define CONFIG_SYS_MMC_BASE 0xF0000000 +#endif /* * Stack sizes diff --git a/include/devices.h b/include/devices.h index 84c4514..3a9881b 100644 --- a/include/devices.h +++ b/include/devices.h @@ -98,6 +98,9 @@ struct list_head* device_get_list(void); device_t* device_get_by_name(char* name); device_t* device_clone(device_t *dev); +#ifdef CONFIG_ARM_DCC_MULTI +int drv_arm_dcc_init(void); +#endif #ifdef CONFIG_LCD int drv_lcd_init (void); #endif diff --git a/include/nomadik.h b/include/nomadik.h new file mode 100644 index 0000000..d9405fd --- /dev/null +++ b/include/nomadik.h @@ -0,0 +1,39 @@ +/* Collection of constants used to access Nomadik registers */ + +#ifndef __NOMADIK_H__ +#define __NOMADIK_H__ + +/* Base addresses of our peripherals */ +#define NOMADIK_SRC_BASE 0x101E0000 /* System and Reset Cnt */ +#define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */ +#define NOMADIK_MPMC_BASE 0x10110000 /* SDRAM Controller */ +#define NOMADIK_FSMC_BASE 0x10100000 /* FSMC Controller */ +#define NOMADIK_1NAND_BASE 0x30000000 +#define NOMADIK_GPIO0_BASE 0x101E4000 +#define NOMADIK_GPIO1_BASE 0x101E5000 +#define NOMADIK_GPIO2_BASE 0x101E6000 +#define NOMADIK_GPIO3_BASE 0x101E7000 +#define NOMADIK_CPLD_BASE 0x36000000 +#define NOMADIK_UART0_BASE 0x101FD000 +#define NOMADIK_UART1_BASE 0x101FB000 +#define NOMADIK_UART2_BASE 0x101F2000 + +#define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */ +#define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */ + +#define NOMADIK_RTC_BASE 0x101E8000 +#define NOMADIK_ETH0_BASE 0x36800300 +#define NOMADIK_CPLD_UART_BASE 0x36480000 + +/* Chip select registers ("Flexible Static Memory Controller") */ + +#define REG_FSMC_BCR0 (NOMADIK_FSMC_BASE + 0x00) +#define REG_FSMC_BTR0 (NOMADIK_FSMC_BASE + 0x04) +#define REG_FSMC_BCR1 (NOMADIK_FSMC_BASE + 0x08) +#define REG_FSMC_BTR1 (NOMADIK_FSMC_BASE + 0x0c) +#define REG_FSMC_PCR0 (NOMADIK_FSMC_BASE + 0x40) +#define REG_FSMC_PMEM0 (NOMADIK_FSMC_BASE + 0x48) +#define REG_FSMC_PATT0 (NOMADIK_FSMC_BASE + 0x4c) +#define REG_FSMC_ECCR0 (NOMADIK_FSMC_BASE + 0x54) + +#endif /* __NOMADIK_H__ */ diff --git a/lib_arm/board.c b/lib_arm/board.c index f125d38..09eaaf2 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -145,6 +145,9 @@ void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))) * but let's get it working (again) first... */ +#if defined(CONFIG_ARM_DCC) && !defined(CONFIG_BAUDRATE) +#define CONFIG_BAUDRATE 115200 +#endif static int init_baudrate (void) { char tmp[64]; /* long enough for environment variables */ diff --git a/lib_m68k/bootm.c b/lib_m68k/bootm.c index 0798e07..958c5ce 100644..100755 --- a/lib_m68k/bootm.c +++ b/lib_m68k/bootm.c @@ -111,11 +111,12 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) /* * Linux Kernel Parameters (passing board info data): - * r3: ptr to board info data - * r4: initrd_start or 0 if no initrd - * r5: initrd_end - unused if r4 is 0 - * r6: Start of command line string - * r7: End of command line string + * sp+00: Ignore, side effect of using jsr to jump to kernel + * sp+04: ptr to board info data + * sp+08: initrd_start or 0 if no initrd + * sp+12: initrd_end - unused if initrd_start is 0 + * sp+16: Start of command line string + * sp+20: End of command line string */ (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end); /* does not return */ |