ColdFire: Remove R5200 board

This board never went into production

Signed-off-by: Zachary P. Landau <zachary.landau@labxtechnologies.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>

10 files changed, 1 insertions, 885 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index e31ea06..1e29935 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -654,10 +654,6 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
 
 	TASREG			MCF5249
 
-Zachary P. Landau <zachary.landau@labxtechnologies.com>
-
-	r5200			mcf52x2
-
 TsiChung Liew <Tsi-Chung.Liew@freescale.com>
 
 	M52277EVB		mcf5227x
diff --git a/MAKEALL b/MAKEALL
index c12da28..b4e8cf1 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -667,7 +667,6 @@ LIST_coldfire="			\
 	M54455EVB		\
 	M5475AFE		\
 	M5485AFE		\
-	r5200			\
 	TASREG			\
 "
 
diff --git a/Makefile b/Makefile
index 3362c33..f8db8d0 100644
--- a/Makefile
+++ b/Makefile
@@ -1828,9 +1828,6 @@ M5282EVB_config :		unconfig
 TASREG_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
 
-r5200_config :		unconfig
-	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 r5200
-
 M5329AFEE_config \
 M5329BFEE_config :	unconfig
 	@case "$@" in \
diff --git a/board/r5200/Makefile b/board/r5200/Makefile
deleted file mode 100644
index 2ec71ee..0000000
--- a/board/r5200/Makefile
+++ /dev/null
@@ -1,44 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).a
-
-COBJS	= $(BOARD).o mii.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS)
-	$(AR) $(ARFLAGS) $@ $(OBJS)
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/r5200/config.mk b/board/r5200/config.mk
deleted file mode 100644
index 8fc5319..0000000
--- a/board/r5200/config.mk
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-TEXT_BASE = 0x10000000
diff --git a/board/r5200/mii.c b/board/r5200/mii.c
deleted file mode 100644
index 706c90f..0000000
--- a/board/r5200/mii.c
+++ /dev/null
@@ -1,303 +0,0 @@
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/fec.h>
-#include <asm/immap.h>
-
-#include <config.h>
-#include <net.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
-#undef MII_DEBUG
-#undef ET_DEBUG
-
-int fecpin_setclear(struct eth_device *dev, int setclear)
-{
-	if (setclear) {
-		/* Enable Ethernet pins */
-		mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
-	} else {
-	}
-
-	return 0;
-}
-
-#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
-#include <miiphy.h>
-
-/* Make MII read/write commands for the FEC. */
-#define mk_mii_read(ADDR, REG)	(0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
-
-#define mk_mii_write(ADDR, REG, VAL)	(0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
-
-/* PHY identification */
-#define PHY_ID_LXT970		0x78100000	/* LXT970 */
-#define PHY_ID_LXT971		0x001378e0	/* LXT971 and 972 */
-#define PHY_ID_82555		0x02a80150	/* Intel 82555 */
-#define PHY_ID_QS6612		0x01814400	/* QS6612 */
-#define PHY_ID_AMD79C784	0x00225610	/* AMD 79C784 */
-#define PHY_ID_LSI80225		0x0016f870	/* LSI 80225 */
-#define PHY_ID_LSI80225B	0x0016f880	/* LSI 80225/B */
-#define PHY_ID_DP83848VV	0x20005C90	/* National 83848 */
-#define PHY_ID_DP83849		0x20005CA2	/* National 82849 */
-#define PHY_ID_KS8721BL		0x00221619	/* Micrel KS8721BL/SL */
-
-#define STR_ID_LXT970		"LXT970"
-#define STR_ID_LXT971		"LXT971"
-#define STR_ID_82555		"Intel82555"
-#define STR_ID_QS6612		"QS6612"
-#define STR_ID_AMD79C784	"AMD79C784"
-#define STR_ID_LSI80225		"LSI80225"
-#define STR_ID_LSI80225B	"LSI80225/B"
-#define STR_ID_DP83848VV	"N83848"
-#define STR_ID_DP83849		"N83849"
-#define STR_ID_KS8721BL		"KS8721BL"
-
-/****************************************************************************
- * mii_init -- Initialize the MII for MII command without ethernet
- * This function is a subset of eth_init
- ****************************************************************************
- */
-void mii_reset(struct fec_info_s *info)
-{
-	volatile fec_t *fecp = (fec_t *) (info->miibase);
-	int i;
-
-	fecp->ecr = FEC_ECR_RESET;
-	for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
-		udelay(1);
-	}
-	if (i == FEC_RESET_DELAY) {
-		printf("FEC_RESET_DELAY timeout\n");
-	}
-}
-
-/* send command to phy using mii, wait for result */
-uint mii_send(uint mii_cmd)
-{
-	struct fec_info_s *info;
-	struct eth_device *dev;
-	volatile fec_t *ep;
-	uint mii_reply;
-	int j = 0;
-
-	/* retrieve from register structure */
-	dev = eth_get_dev();
-	info = dev->priv;
-
-	ep = (fec_t *) info->miibase;
-
-	ep->mmfr = mii_cmd;	/* command to phy */
-
-	/* wait for mii complete */
-	while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
-		udelay(1);
-		j++;
-	}
-	if (j >= MCFFEC_TOUT_LOOP) {
-		printf("MII not complete\n");
-		return -1;
-	}
-
-	mii_reply = ep->mmfr;	/* result from phy */
-	ep->eir = FEC_EIR_MII;	/* clear MII complete */
-#ifdef ET_DEBUG
-	printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
-	       __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
-#endif
-
-	return (mii_reply & 0xffff);	/* data read from phy */
-}
-#endif				/* CFG_DISCOVER_PHY || (CONFIG_CMD_MII) */
-
-#if defined(CFG_DISCOVER_PHY)
-int mii_discover_phy(struct eth_device *dev)
-{
-#define MAX_PHY_PASSES 11
-	struct fec_info_s *info = dev->priv;
-	int phyaddr, pass;
-	uint phyno, phytype;
-
-	if (info->phyname_init)
-		return info->phy_addr;
-
-	phyaddr = -1;		/* didn't find a PHY yet */
-	for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
-		if (pass > 1) {
-			/* PHY may need more time to recover from reset.
-			 * The LXT970 needs 50ms typical, no maximum is
-			 * specified, so wait 10ms before try again.
-			 * With 11 passes this gives it 100ms to wake up.
-			 */
-			udelay(10000);	/* wait 10ms */
-		}
-
-		for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
-
-			phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
-#ifdef ET_DEBUG
-			printf("PHY type 0x%x pass %d type\n", phytype, pass);
-#endif
-			if (phytype != 0xffff) {
-				phyaddr = phyno;
-				phytype <<= 16;
-				phytype |=
-				    mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
-
-				switch (phytype & 0xffffffff) {
-				case PHY_ID_KS8721BL:
-					strcpy(info->phy_name,
-					       STR_ID_KS8721BL);
-					info->phyname_init = 1;
-					break;
-				default:
-					strcpy(info->phy_name, "unknown");
-					info->phyname_init = 1;
-					break;
-				}
-
-#ifdef ET_DEBUG
-				printf("PHY @ 0x%x pass %d type ", phyno, pass);
-				switch (phytype & 0xffffffff) {
-				case PHY_ID_KS8721BL:
-					printf(STR_ID_KS8721BL);
-					break;
-				default:
-					printf("0x%08x\n", phytype);
-					break;
-				}
-#endif
-			}
-		}
-	}
-	if (phyaddr < 0)
-		printf("No PHY device found.\n");
-
-	return phyaddr;
-}
-#endif				/* CFG_DISCOVER_PHY */
-
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
-
-void __mii_init(void)
-{
-	volatile fec_t *fecp;
-	struct fec_info_s *info;
-	struct eth_device *dev;
-	int miispd = 0, i = 0;
-	u16 autoneg = 0;
-
-	/* retrieve from register structure */
-	dev = eth_get_dev();
-	info = dev->priv;
-
-	fecp = (fec_t *) info->miibase;
-
-	fecpin_setclear(dev, 1);
-
-	mii_reset(info);
-
-	/* We use strictly polling mode only */
-	fecp->eimr = 0;
-
-	/* Clear any pending interrupt */
-	fecp->eir = 0xffffffff;
-
-	/* Set MII speed */
-	miispd = (gd->bus_clk / 1000000) / 5;
-	fecp->mscr = miispd << 1;
-
-	info->phy_addr = mii_discover_phy(dev);
-
-#define AUTONEGLINK		(PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
-	while (i < MCFFEC_TOUT_LOOP) {
-		autoneg = 0;
-		miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
-		i++;
-
-		if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
-			break;
-
-		udelay(500);
-	}
-	if (i >= MCFFEC_TOUT_LOOP) {
-		printf("Auto Negotiation not complete\n");
-	}
-
-	/* adapt to the half/full speed settings */
-	info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
-	info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
-}
-
-/*****************************************************************************
- * Read and write a MII PHY register, routines used by MII Utilities
- *
- * FIXME: These routines are expected to return 0 on success, but mii_send
- *	  does _not_ return an error code. Maybe 0xFFFF means error, i.e.
- *	  no PHY connected...
- *	  For now always return 0.
- * FIXME: These routines only work after calling eth_init() at least once!
- *	  Otherwise they hang in mii_send() !!! Sorry!
- *****************************************************************************/
-
-int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
-		       unsigned short *value)
-{
-	short rdreg;		/* register working value */
-
-#ifdef MII_DEBUG
-	printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
-#endif
-	rdreg = mii_send(mk_mii_read(addr, reg));
-
-	*value = rdreg;
-
-#ifdef MII_DEBUG
-	printf("0x%04x\n", *value);
-#endif
-
-	return 0;
-}
-
-int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
-			unsigned short value)
-{
-	short rdreg;		/* register working value */
-
-#ifdef MII_DEBUG
-	printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
-#endif
-
-	rdreg = mii_send(mk_mii_write(addr, reg, value));
-
-#ifdef MII_DEBUG
-	printf("0x%04x\n", value);
-#endif
-
-	return 0;
-}
-
-#endif				/* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/r5200/r5200.c b/board/r5200/r5200.c
deleted file mode 100644
index 69f3a76..0000000
--- a/board/r5200/r5200.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
-
-
-int checkboard (void) {
-	puts ("Board: R5200 Ethernet Module\n");
-	return 0;
-};
-
-long int initdram (int board_type) {
-	int i;
-
-	/*
-	 *  Set CS2 pin to be SD_CS0
-	 */
-	mbar_writeByte(MCF_GPIO_PAR_CS, mbar_readByte(MCF_GPIO_PAR_CS)
-			| MCF_GPIO_PAR_CS_PAR_CS2);
-
-	mbar_writeByte(MCF_GPIO_PAR_SDRAM, mbar_readByte(MCF_GPIO_PAR_SDRAM)
-			| MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(0x01));
-
-	/*
-	 * Check to see if the SDRAM has already been initialized
-	 * by a run control tool
-	 */
-	if (!(mbar_readLong(MCF_SDRAMC_DACR0) & MCF_SDRAMC_DACRn_RE)) {
-		/*
-		 * Initialize DRAM Control Register: DCR
-		 */
-		mbar_writeShort(MCF_SDRAMC_DCR, MCF_SDRAMC_DCR_RTIM(0x01)
-				| MCF_SDRAMC_DCR_RC(0x30));
-
-		/*
-		 * Initialize DACR0
-		 */
-		mbar_writeLong(MCF_SDRAMC_DACR0,
-				MCF_SDRAMC_DACRn_BA(CFG_SDRAM_BASE>>18)
-				| MCF_SDRAMC_DACRn_CASL(0)
-				| MCF_SDRAMC_DACRn_CBM(3)
-				| MCF_SDRAMC_DACRn_PS(2));
-
-		/*
-		 * Initialize DMR0
-		 */
-		mbar_writeLong(MCF_SDRAMC_DMR0,
-				MCF_SDRAMC_DMRn_BAM_8M
-				| MCF_SDRAMC_DMRn_V);
-
-		/*
-		 * Set IP bit in DACR
-		 */
-		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
-				| MCF_SDRAMC_DACRn_IP);
-
-		/*
-		 * Wait at least 20ns to allow banks to precharge
-		 */
-		for (i = 0; i < 5; i++)
-			asm(" nop");
-
-		/*
-		 * Write to this block to initiate precharge
-		 */
-		*(u16 *)(CFG_SDRAM_BASE) = 0x9696;
-
-		/*
-		 * Set RE bit in DACR
-		 */
-		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
-				| MCF_SDRAMC_DACRn_RE);
-
-
-		/*
-		 * Wait for at least 8 auto refresh cycles to occur
-		 */
-		for (i = 0; i < 2000; i++)
-			asm(" nop");
-
-		/*
-		 * Finish the configuration by issuing the MRS.
-		 */
-		mbar_writeLong(MCF_SDRAMC_DACR0, mbar_readLong(MCF_SDRAMC_DACR0)
-				| MCF_SDRAMC_DACRn_MRS);
-
-
-		/*
-		 * Write to the SDRAM Mode Register
-		 */
-		*(u16 *)(CFG_SDRAM_BASE + 0x1000) = 0x9696;
-	}
-
-	return CFG_SDRAM_SIZE * 1024 * 1024;
-};
-
-int testdram (void) {
-	/* TODO: XXX XXX XXX */
-	printf ("DRAM test not implemented!\n");
-
-	return (0);
-}
diff --git a/board/r5200/u-boot.lds b/board/r5200/u-boot.lds
deleted file mode 100644
index 29fe589..0000000
--- a/board/r5200/u-boot.lds
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(m68k)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
-/* Do we need any of these for elf?
-   __DYNAMIC = 0;    */
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .interp : { *(.interp) }
-  .hash          : { *(.hash)		}
-  .dynsym        : { *(.dynsym)		}
-  .dynstr        : { *(.dynstr)		}
-  .rel.text      : { *(.rel.text)		}
-  .rela.text     : { *(.rela.text) 	}
-  .rel.data      : { *(.rel.data)		}
-  .rela.data     : { *(.rela.data) 	}
-  .rel.rodata    : { *(.rel.rodata) 	}
-  .rela.rodata   : { *(.rela.rodata) 	}
-  .rel.got       : { *(.rel.got)		}
-  .rela.got      : { *(.rela.got)		}
-  .rel.ctors     : { *(.rel.ctors)	}
-  .rela.ctors    : { *(.rela.ctors)	}
-  .rel.dtors     : { *(.rel.dtors)	}
-  .rela.dtors    : { *(.rela.dtors)	}
-  .rel.bss       : { *(.rel.bss)		}
-  .rela.bss      : { *(.rela.bss)		}
-  .rel.plt       : { *(.rel.plt)		}
-  .rela.plt      : { *(.rela.plt)		}
-  .init          : { *(.init)	}
-  .plt : { *(.plt) }
-  .text      :
-  {
-    /* WARNING - the following is hand-optimized to fit within	*/
-    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
-
-    cpu/mcf52x2/start.o		(.text)
-    lib_m68k/traps.o		(.text)
-    cpu/mcf52x2/interrupts.o	(.text)
-    common/dlmalloc.o		(.text)
-    lib_generic/zlib.o		(.text)
-
-    . = DEFINED(env_offset) ? env_offset : .;
-    common/environment.o	(.text)
-
-    *(.text)
-    *(.fixup)
-    *(.got1)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-  }
-  .fini      : { *(.fini)    } =0
-  .ctors     : { *(.ctors)   }
-  .dtors     : { *(.dtors)   }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-
-  .reloc   :
-  {
-    __got_start = .;
-    *(.got)
-    __got_end = .;
-    _GOT2_TABLE_ = .;
-    *(.got2)
-    _FIXUP_TABLE_ = .;
-    *(.fixup)
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data)
-    *(.data1)
-    *(.sdata)
-    *(.sdata2)
-    *(.dynamic)
-    CONSTRUCTORS
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   _sbss = .;
-   *(.sbss) *(.scommon)
-   *(.dynbss)
-   *(.bss)
-   *(COMMON)
-   . = ALIGN(4);
-   _ebss = .;
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index f6c58c2..9e496a4 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -56,9 +56,7 @@
 _vectors:
 
 .long	0x00000000		/* Flash offset is 0 until we setup CS0 */
-#if defined(CONFIG_R5200)
-.long	0x400
-#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
+#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
 .long	_start - TEXT_BASE
 #else
 .long	_START
@@ -185,18 +183,6 @@ _after_flashbar_copy:
 	movec	%d0, %VBR
 #endif
 
-#ifdef	CONFIG_R5200
-	move.l	#(_flash_setup-CFG_FLASH_BASE), %a0
-	move.l	#(_flash_setup_end-CFG_FLASH_BASE), %a1
-	move.l	#(CFG_INIT_RAM_ADDR), %a2
-_copy_flash:
-	move.l	(%a0)+, (%a2)+
-	cmp.l	%a0, %a1
-	bgt.s	_copy_flash
-	jmp	CFG_INIT_RAM_ADDR
-_after_flash_copy:
-#endif
-
 #ifdef CONFIG_M5275
 	/* Initialize IPSBAR */
 	move.l	#(CFG_MBAR + 1), %d0		/* set IPSBAR address + valid flag */
@@ -230,24 +216,6 @@ _after_flash_copy:
 
 /*------------------------------------------------------------------------------*/
 
-#ifdef	CONFIG_R5200
-_flash_setup:
-	/* CSAR0 */
-	move.l	#((CFG_FLASH_BASE & 0xffff0000) >> 16), %d0
-	move.w	%d0, 0x40000080
-
-	/* CSCR0 */
-	move.l	#0x2180, %d0		/* 8 wait states, 16bit port, auto ack,  */
-	move.w	%d0, 0x4000008A
-
-	/* CSMR0 */
-	move.l	#0x001f0001, %d0	/* 2 MB, valid */
-	move.l	%d0, 0x40000084
-
-	jmp	_after_flash_copy.L
-_flash_setup_end:
-#endif
-
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
diff --git a/include/configs/r5200.h b/include/configs/r5200.h
deleted file mode 100644
index fc7658b..0000000
--- a/include/configs/r5200.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * Configuation settings for the R5200 board
- *
- * (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
- * Based on Motorola MC5272C3 board config
- * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef _R5200_H
-#define _R5200_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_MCF52x2			/* define processor family */
-#define CONFIG_M5271			/* define processor type */
-#define CONFIG_R5200			/* define board type */
-
-#define CONFIG_MCFTMR
-
-#define CONFIG_MCFUART
-#define CFG_UART_PORT		(0)
-#define CONFIG_BAUDRATE		19200
-#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
-
-#define CONFIG_WATCHDOG
-#define CONFIG_WATCHDOG_TIMEOUT 0xFFFF	/* clock modulus */
-
-/* Configuration for environment
- * Environment is embedded in u-boot in the second sector of the flash
- */
-#ifndef CONFIG_MONITOR_IS_IN_RAM
-#define CFG_ENV_OFFSET		0x20000
-#define CFG_ENV_SECT_SIZE	0x20000
-#define CFG_ENV_IS_IN_FLASH	1
-#define CFG_ENV_IS_EMBEDDED	1
-#else
-#define CFG_ENV_ADDR		0xf0020000
-#define CFG_ENV_SECT_SIZE	0x2000
-#define CFG_ENV_IS_IN_FLASH	1
-#endif
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_NET
-
-#undef CONFIG_CMD_LOADS
-#undef CONFIG_CMD_LOADB
-
-#define CONFIG_MCFFEC
-#ifdef CONFIG_MCFFEC
-#	define CONFIG_NET_MULTI		1
-#	define CONFIG_MII		1
-#	define CFG_DISCOVER_PHY
-#	define CFG_RX_ETH_BUFFER	8
-#	define CFG_FAULT_ECHO_LINK_DOWN
-
-#	define CFG_FEC0_PINMUX		0
-#	define CFG_FEC0_MIIBASE		CFG_FEC0_IOBASE
-#	define MCFFEC_TOUT_LOOP 	50000
-/* If CFG_DISCOVER_PHY is not defined - hardcoded */
-#	ifndef CFG_DISCOVER_PHY
-#		define FECDUPLEX	FULL
-#		define FECSPEED		_100BASET
-#	else
-#		ifndef CFG_FAULT_ECHO_LINK_DOWN
-#			define CFG_FAULT_ECHO_LINK_DOWN
-#		endif
-#	endif			/* CFG_DISCOVER_PHY */
-#endif
-
-/* Note: We only copy one sectors worth of application code from location
- * 10200000 for speed purposes.  Increase the size if necessary */
-#define CONFIG_BOOTCOMMAND	"cp.b 10200000 0 20000; go 400"
-#define	CONFIG_BOOTDELAY	1
-
-#define CFG_PROMPT		"u-boot> "
-#define CFG_LONGHELP				/* undef to save memory		*/
-
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CBSIZE		1024		/* Console I/O Buffer Size	*/
-#else
-#define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
-#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS		16		/* max number of command args	*/
-#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CFG_LOAD_ADDR		0x00002000
-
-#define CFG_MEMTEST_START	0x400
-#define CFG_MEMTEST_END		0x380000
-
-#define CFG_HZ			1000000
-#define CFG_CLK			100000000
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-#define CFG_MBAR		0x40000000	/* Register Base Addrs */
-
-#define CFG_ENET_BD_BASE	0x480000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CFG_INIT_RAM_ADDR	0x20000000
-#define CFG_INIT_RAM_END	0x1000	/* End of used area in internal SRAM	*/
-#define CFG_GBL_DATA_SIZE	64	/* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CFG_SDRAM_BASE _must_ start at 0
- */
-#define CFG_SDRAM_BASE		0x00000000
-#define CFG_SDRAM_SIZE		8		/* SDRAM size in MB */
-#define CFG_FLASH_BASE		0x10000000
-
-#ifdef	CONFIG_MONITOR_IS_IN_RAM
-#define CFG_MONITOR_BASE	0x20000
-#else
-#define CFG_MONITOR_BASE	(CFG_FLASH_BASE + 0x400)
-#endif
-
-#define CFG_MONITOR_LEN		0x20001
-#define CFG_MALLOC_LEN		(256 << 10)
-#define CFG_BOOTPARAMS_LEN	64*1024
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization ??
- */
-#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
-#define CFG_MAX_FLASH_SECT	1024	/* max number of sectors on one chip	*/
-#define CFG_FLASH_ERASE_TOUT	1000
-
-#define CFG_FLASH_CFI		1
-#define CFG_FLASH_CFI_DRIVER	1
-#define CFG_FLASH_SIZE		0x800000
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_CACHELINE_SIZE	16
-
-/*-----------------------------------------------------------------------
- * Memory bank definitions
- */
-
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CFG_FECI2C		0xF0
-
-#endif	/* _R5200_H */