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author | Wolfgang Grandegger <wg@grandegger.com> | 2008-06-04 12:45:22 +0200 |
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committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-06-10 18:22:26 -0500 |
commit | 398415114f0a705163a14543e9fef03f734b1ffa (patch) | |
tree | 2f1a4523228aa2531a439b03f6463a4322cddca1 | |
parent | 4677988c7edc070c3786d3db7994abeca3ab82a0 (diff) | |
download | u-boot-imx-398415114f0a705163a14543e9fef03f734b1ffa.zip u-boot-imx-398415114f0a705163a14543e9fef03f734b1ffa.tar.gz u-boot-imx-398415114f0a705163a14543e9fef03f734b1ffa.tar.bz2 |
PPC: add accessor macros to clear and set bits in one shot
PPC: add accessor macros to clear and set bits in one shot
This patch adds macros from linux/include/asm-powerpc/io.h to clear and
set bits in one shot using the in_be32, out_be32, etc. accessor functions.
They are very handy to manipulate bits it I/O registers.
This patch is required for my forthcoming FSL NAND UPM driver re-write and
the support for the TQM8548 module.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
-rw-r--r-- | include/asm-ppc/io.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 7cc28bf..c349681 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -238,6 +238,42 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val) __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); } +/* Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + /* * Given a physical address and a length, return a virtual address * that can be used to access the memory range with the caching |