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| author | Stefan Roese <sr@denx.de> | 2007-05-22 12:48:09 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-05-22 12:48:09 +0200 |
| commit | 9f0077abd69f7a7c756a915b961037302be3e6f2 (patch) | |
| tree | c2ffd6baadfa66f2ff6922ac0a837e13bba77b06 | |
| parent | 6f3dfc139a838b0841c151efe00ad47db2366e79 (diff) | |
| download | u-boot-imx-9f0077abd69f7a7c756a915b961037302be3e6f2.zip u-boot-imx-9f0077abd69f7a7c756a915b961037302be3e6f2.tar.gz u-boot-imx-9f0077abd69f7a7c756a915b961037302be3e6f2.tar.bz2 | |
ppc4xx: Use do { ... } while (0) for CPR & SDR access macros
Signed-off-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | include/ppc405.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/ppc405.h b/include/ppc405.h index a2503a9..fffae4d 100644 --- a/include/ppc405.h +++ b/include/ppc405.h @@ -547,8 +547,8 @@ #define sdrcfga (SDR_DCR_BASE+0x0) /* ADDR */ #define sdrcfgd (SDR_DCR_BASE+0x1) /* Data */ -#define mtsdr(reg, data) mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,data) -#define mfsdr(reg, data) mtdcr(sdrcfga,reg);data = mfdcr(sdrcfgd) +#define mtsdr(reg, data) do { mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,data); } while (0) +#define mfsdr(reg, data) do { mtdcr(sdrcfga,reg);data = mfdcr(sdrcfgd); } while (0) #define sdrnand0 0x4000 #define sdrultra0 0x4040 @@ -593,8 +593,8 @@ /* * Macro for accessing the indirect CPR register */ -#define mtcpr(reg, data) mtdcr(cprcfga,reg);mtdcr(cprcfgd,data) -#define mfcpr(reg, data) mtdcr(cprcfga,reg);data = mfdcr(cprcfgd) +#define mtcpr(reg, data) do { mtdcr(cprcfga,reg);mtdcr(cprcfgd,data); } while (0) +#define mfcpr(reg, data) do { mtdcr(cprcfga,reg);data = mfdcr(cprcfgd); } while (0) #define CPR_CLKUPD_ENPLLCH_EN 0x40000000 /* Enable CPR PLL Changes */ #define CPR_CLKUPD_ENDVCH_EN 0x20000000 /* Enable CPR Sys. Div. Changes */ |