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author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-11-18 15:07:00 -0600 |
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committer | Ranjani Vaidyanathan <ra5478@freescale.com> | 2011-11-18 15:07:00 -0600 |
commit | daa30bb22e006d9f39298fb28ea8391ae4ccbc52 (patch) | |
tree | e72eea97fc9d778257a09a1fa76ba8b3dcbbd04b | |
parent | 6ef098d726b3f7efb955ebea857311aca0192f83 (diff) | |
download | u-boot-imx-daa30bb22e006d9f39298fb28ea8391ae4ccbc52.zip u-boot-imx-daa30bb22e006d9f39298fb28ea8391ae4ccbc52.tar.gz u-boot-imx-daa30bb22e006d9f39298fb28ea8391ae4ccbc52.tar.bz2 |
ENGR00162642: Fix bug in setting VDDSOC voltagerel_imx_2.6.38_11.11.01imx_v2009.08_11.11.01
Fix incorrect VDDSOC voltage setting in uboot.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
-rw-r--r-- | cpu/arm_cortexa8/mx6/generic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c index 6af07d0..eef3dd1 100644 --- a/cpu/arm_cortexa8/mx6/generic.c +++ b/cpu/arm_cortexa8/mx6/generic.c @@ -784,8 +784,8 @@ int arch_cpu_init(void) /* Increase the VDDSOC to 1.2V */ val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE); val &= ~BM_ANADIG_REG_CORE_REG2_TRG; - val |= BF_ANADIG_REG_CORE_REG2_TRG(0x5); - REG_SET(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val); + val |= BF_ANADIG_REG_CORE_REG2_TRG(0x14); + REG_WR(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val); return 0; } |