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| author | Terry Lv <r65388@freescale.com> | 2011-04-08 16:16:34 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2011-04-20 14:44:37 +0800 |
| commit | ba8a0db66ab3574637946721b213f27fc0965f98 (patch) | |
| tree | 745609dcb007c1973a15c99b4233373c5cc12776 | |
| parent | dd4e712ba7605e97e2f55fb997085951c1fcd7d2 (diff) | |
| download | u-boot-imx-ba8a0db66ab3574637946721b213f27fc0965f98.zip u-boot-imx-ba8a0db66ab3574637946721b213f27fc0965f98.tar.gz u-boot-imx-ba8a0db66ab3574637946721b213f27fc0965f98.tar.bz2 | |
ENGR00141885: mx50 and mx53 reboot fail when booting from spi nor
mx50 reboot fail when booting from spi nor.
Reconfigure eCSPI SS signal as GPIO before reset.
Signed-off-by: Terry Lv <r65388@freescale.com>
| -rw-r--r-- | cpu/arm_cortexa8/mx50/interrupts.c | 9 | ||||
| -rw-r--r-- | cpu/arm_cortexa8/mx53/interrupts.c | 8 |
2 files changed, 15 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx50/interrupts.c b/cpu/arm_cortexa8/mx50/interrupts.c index 4576507..0e4a49e 100644 --- a/cpu/arm_cortexa8/mx50/interrupts.c +++ b/cpu/arm_cortexa8/mx50/interrupts.c @@ -2,7 +2,7 @@ * (C) Copyright 2007 * Sascha Hauer, Pengutronix * - * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -26,6 +26,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/mx50.h> +#include <asm/arch/iomux.h> /* nothing really to do with interrupts, just starts up a counter. */ int interrupt_init(void) @@ -35,5 +36,11 @@ int interrupt_init(void) void reset_cpu(ulong addr) { + /* Reconfigure eCSPI SS signal as GPIO before reset */ + /* de-select SS0 of instance: CSPI */ + mxc_request_iomux(MX50_PIN_CSPI_SS0, IOMUX_CONFIG_ALT1); + /* de-select SS1 of instance: eCSPI1 */ + mxc_request_iomux(MX50_PIN_ECSPI1_MOSI, IOMUX_CONFIG_ALT1); + __REG16(WDOG1_BASE_ADDR) = 4; } diff --git a/cpu/arm_cortexa8/mx53/interrupts.c b/cpu/arm_cortexa8/mx53/interrupts.c index 0b7bd95..0cc24db 100644 --- a/cpu/arm_cortexa8/mx53/interrupts.c +++ b/cpu/arm_cortexa8/mx53/interrupts.c @@ -2,7 +2,7 @@ * (C) Copyright 2007 * Sascha Hauer, Pengutronix * - * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -26,6 +26,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/mx53.h> +#include <asm/arch/iomux.h> /* nothing really to do with interrupts, just starts up a counter. */ int interrupt_init(void) @@ -35,5 +36,10 @@ int interrupt_init(void) void reset_cpu(ulong addr) { + /* de-select SS0 of instance: eCSPI1 */ + mxc_request_iomux(MX53_PIN_EIM_EB2, IOMUX_CONFIG_ALT1); + /* de-select SS1 of instance: eCSPI1 */ + mxc_request_iomux(MX53_PIN_EIM_D19, IOMUX_CONFIG_ALT1); + __REG16(WDOG1_BASE_ADDR) = 4; } |