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author | Yuri Tikhonov <yur@emcraft.com> | 2008-04-29 15:06:41 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-04-29 16:10:38 +0200 |
commit | b2d527a8b9fb50afccbaf79b5540952585cdc760 (patch) | |
tree | 3275919acaf9190b7dea7fd902d1f7a93d48777f | |
parent | 138105efe1d2b1a40a3a97b4c1f85c2111bea2d8 (diff) | |
download | u-boot-imx-b2d527a8b9fb50afccbaf79b5540952585cdc760.zip u-boot-imx-b2d527a8b9fb50afccbaf79b5540952585cdc760.tar.gz u-boot-imx-b2d527a8b9fb50afccbaf79b5540952585cdc760.tar.bz2 |
lwmon5: minor clean-up to include/configs/lwmon5.h
LWMON5 DSPIC POST uses the watch-dog scratch register. So, make
the CFG_DSPIC_TEST_ADDR definition more readable.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
-rw-r--r-- | include/configs/lwmon5.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 690584a..1f669aa 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -91,9 +91,9 @@ /* Additional registers for watchdog timer post test */ -#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1) #define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK2) #define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_MASK1) +#define CFG_DSPIC_TEST_ADDR CFG_WATCHDOG_FLAGS_ADDR #define CFG_WATCHDOG_MAGIC 0x12480000 #define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000 #define CFG_DSPIC_TEST_MASK 0x00000001 |