[Microblaze][PATCH] part 2

timer support
interrupt controller support
flash support
ethernet support
cache support
board information support
env support
booting image support

adding support for Xilinx ML401

13 files changed, 518 insertions, 29 deletions

diff --git a/MAKEALL b/MAKEALL
index 8431b3e..172f3e5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -292,7 +292,7 @@ LIST_nios2="	\
 #########################################################################
 
 LIST_microblaze="	\
-	suzaku
+	suzaku		ml401
 "
 
 #########################################################################
diff --git a/Makefile b/Makefile
index 358d181..f67eb26 100644
--- a/Makefile
+++ b/Makefile
@@ -2304,6 +2304,11 @@ suzaku_config:	unconfig
 	@echo "#define CONFIG_SUZAKU 1" >> $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
 
+ml401_config:	unconfig
+	@ >include/config.h
+	@echo "#define CONFIG_ML401 1" >> include/config.h
+	@./mkconfig -a $(@:_config=) microblaze microblaze ml401 xilinx
+
 #########################################################################
 ## Blackfin
 #########################################################################
@@ -2381,3 +2386,4 @@ backup:
 	gtar --force-local -zcvf `date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F
 
 #########################################################################
+
diff --git a/board/AtmarkTechno/suzaku/u-boot.lds b/board/AtmarkTechno/suzaku/u-boot.lds
index 00a8ef7..93147fc 100644
--- a/board/AtmarkTechno/suzaku/u-boot.lds
+++ b/board/AtmarkTechno/suzaku/u-boot.lds
@@ -61,6 +61,6 @@ SECTIONS
 	{
 		__bss_start = .;
 		*(.bss)
-		__bss_start = .;
+		__bss_end = .;
 	}
 }
diff --git a/board/xilinx/xilinx_enet/emac_adapter.c b/board/xilinx/xilinx_enet/emac_adapter.c
index f159cb6..de62695 100644
--- a/board/xilinx/xilinx_enet/emac_adapter.c
+++ b/board/xilinx/xilinx_enet/emac_adapter.c
@@ -147,7 +147,11 @@ eth_rx(void)
 	RecvFrameLength = PKTSIZE;
 	Result = XEmac_PollRecv(&Emac, (u8 *) etherrxbuff, &RecvFrameLength);
 	if (Result == XST_SUCCESS) {
+#ifndef CONFIG_MICROBLAZE 
 		NetReceive((uchar *)etherrxbuff, RecvFrameLength);
+#else
+		NetReceive(etherrxbuff, RecvFrameLength);
+#endif
 		return (1);
 	} else {
 		return (0);
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index 70de795..d97c09e 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -180,6 +180,32 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	return 0;
 }
+#elif defined(CONFIG_MICROBLAZE) /* ! PPC, which leaves Microblaze */
+
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	int i;
+	bd_t *bd = gd->bd;
+	print_num ("mem start      ",	(ulong)bd->bi_memstart);
+	print_num ("mem size       ",	(ulong)bd->bi_memsize);
+	print_num ("flash start    ",	(ulong)bd->bi_flashstart);
+	print_num ("flash size     ",	(ulong)bd->bi_flashsize);
+	print_num ("flash offset   ",	(ulong)bd->bi_flashoffset);
+#if defined(CFG_SRAM_BASE)
+	print_num ("sram start     ",	(ulong)bd->bi_sramstart);
+	print_num ("sram size      ",	(ulong)bd->bi_sramsize);
+#endif
+#if defined(CFG_CMD_NET)
+	puts ("ethaddr     =");
+	for (i=0; i<6; ++i) {
+		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
+	}
+	puts ("\nip_addr     = ");
+	print_IPaddr (bd->bi_ip_addr);
+#endif
+	printf ("\nbaudrate    = %d bps\n", (ulong)bd->bi_baudrate);
+	return 0;
+}
 
 #else /* ! PPC, which leaves MIPS */
 
diff --git a/common/env_common.c b/common/env_common.c
index eb33422..6e193cf 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -222,6 +222,14 @@ void env_relocate (void)
 	DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr);
 #endif
 
+#ifdef CONFIG_MICROBLAZE
+	/*
+	 * FIXME MALLOC error for Microblaze - error malloc return
+	 * bad value. Correct value is CFG_MONITOR_BASE - CFG_MALLOC_LEN.
+	 */
+	env_ptr = (env_t *)CFG_MONITOR_BASE;
+	DEBUGF ("%s[%d] malloced ENV at %p\n", __FUNCTION__,__LINE__,env_ptr);
+#endif
 	/*
 	 * After relocation to RAM, we can always use the "memory" functions
 	 */
diff --git a/cpu/microblaze/Makefile b/cpu/microblaze/Makefile
index fd54425..db1afa5 100644
--- a/cpu/microblaze/Makefile
+++ b/cpu/microblaze/Makefile
@@ -26,7 +26,8 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(CPU).a
 
 START	= start.o
-COBJS	= cpu.o interrupts.o
+SOBJS	= dcache.o icache.o irq.o disable_int.o enable_int.o
+COBJS	= cpu.o interrupts.o cache.o exception.o timer.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index ccf67e1..37ed16d 100644
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -1,6 +1,8 @@
 /*
+ * (C) Copyright 2007 Michal Simek
  * (C) Copyright 2004 Atmark Techno, Inc.
  *
+ * Michal  SIMEK <monstr@monstr.eu>
  * Yasushi SHOJI <yashi@atmark-techno.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -13,7 +15,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -22,11 +24,185 @@
  * MA 02111-1307 USA
  */
 
-void enable_interrupts(void)
+#include <common.h>
+#include <command.h>
+#include <asm/microblaze_intc.h>
+
+#undef DEBUG_INT
+
+extern void microblaze_disable_interrupts (void);
+extern void microblaze_enable_interrupts (void);
+
+void enable_interrupts (void)
 {
+	microblaze_enable_interrupts ();
 }
 
-int disable_interrupts(void)
+int disable_interrupts (void)
 {
+	microblaze_disable_interrupts ();
 	return 0;
 }
+
+#ifdef CFG_INTC_0
+#ifdef CFG_TIMER_0
+extern void timer_init (void);
+#endif
+
+static struct irq_action vecs[CFG_INTC_0_NUM];
+
+/* mapping structure to interrupt controller */
+microblaze_intc_t *intc = (microblaze_intc_t *) (CFG_INTC_0_ADDR);
+
+/* default handler */
+void def_hdlr (void)
+{
+	puts ("def_hdlr\n");
+}
+
+void enable_one_interrupt (int irq)
+{
+	int mask;
+	int offset = 1;
+	offset <<= irq;
+	mask = intc->ier;
+	intc->ier = (mask | offset);
+#ifdef DEBUG_INT
+	printf ("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
+		intc->ier);
+	printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
+		intc->iar, intc->mer);
+#endif
+}
+
+void disable_one_interrupt (int irq)
+{
+	int mask;
+	int offset = 1;
+	offset <<= irq;
+	mask = intc->ier;
+	intc->ier = (mask & ~offset);
+#ifdef DEBUG_INT
+	printf ("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
+		intc->ier);
+	printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
+		intc->iar, intc->mer);
+#endif
+}
+
+/* adding new handler for interrupt */
+void install_interrupt_handler (int irq, interrupt_handler_t * hdlr, void *arg)
+{
+	struct irq_action *act;
+	/* irq out of range */
+	if ((irq < 0) || (irq > CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS)) {
+		puts ("IRQ out of range\n");
+		return;
+	}
+	act = &vecs[irq];
+	if (hdlr) {		/* enable */
+		act->handler = hdlr;
+		act->arg = arg;
+		act->count = 0;
+		enable_one_interrupt (irq);
+	} else {		/* disable */
+
+		act->handler = (interrupt_handler_t *) def_hdlr;
+		act->arg = (void *)irq;
+		disable_one_interrupt (irq);
+	}
+}
+
+/* initialization interrupt controller - hardware */
+void intc_init (void)
+{
+	intc->mer = 0;
+	intc->ier = 0;
+	intc->iar = 0xFFFFFFFF;
+	/* XIntc_Start - hw_interrupt enable and all interrupt enable */
+	intc->mer = 0x3;
+#ifdef DEBUG_INT
+	printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
+		intc->iar, intc->mer);
+#endif
+}
+
+int interrupts_init (void)
+{
+	int i;
+	/* initialize irq list */
+	for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) {
+		vecs[i].handler = (interrupt_handler_t *) def_hdlr;
+		vecs[i].arg = (void *)i;
+		vecs[i].count = 0;
+	}
+	/* initialize intc controller */
+	intc_init ();
+#ifdef CFG_TIMER_0
+	timer_init ();
+#endif
+	enable_interrupts ();
+	return 0;
+}
+
+void interrupt_handler (void)
+{
+	int irqs;
+	irqs = (intc->isr & intc->ier);	/* find active interrupt */
+
+#ifdef DEBUG_INT
+	printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
+		intc->iar, intc->mer);
+	printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
+#endif
+	struct irq_action *act = vecs;
+	while (irqs) {
+		if (irqs & 1) {
+#ifdef DEBUG_INT
+			printf
+			    ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
+			     act->handler, act->count, act->arg);
+#endif
+			act->handler (act->arg);
+			act->count++;
+		}
+		irqs >>= 1;
+		act++;
+	}
+	intc->iar = 0xFFFFFFFF;	/* erase all events */
+#ifdef DEBUG
+	printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
+		intc->ier, intc->iar, intc->mer);
+	printf ("Interrupt handler on %x line, r14\n", irqs);
+#endif
+}
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#ifdef CFG_INTC_0
+int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	int i;
+	struct irq_action *act = vecs;
+
+	puts ("\nInterrupt-Information:\n\n"
+	      "Nr  Routine   Arg       Count\n"
+	      "-----------------------------\n");
+
+	for (i = 0; i < CONFIG_XILINX_INTC_0_NUM_INTR_INPUTS; i++) {
+		if (act->handler != (interrupt_handler_t*) def_hdlr) {
+			printf ("%02d  %08lx  %08lx  %d\n", i,
+				(int)act->handler, (int)act->arg, act->count);
+		}
+		act++;
+	}
+	puts ("\n");
+	return (0);
+}
+#else
+int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+	puts ("Undefined interrupt controller\n");
+}
+#endif
+#endif				/* CONFIG_COMMANDS & CFG_CMD_IRQ */
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index 7efdbb0..bce3297 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -1,6 +1,8 @@
 /*
+ * (C) Copyright 2007 Michal Simek
  * (C) Copyright 2004 Atmark Techno, Inc.
  *
+ * Michal  SIMEK <monstr@monstr.eu>
  * Yasushi SHOJI <yashi@atmark-techno.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -13,7 +15,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -27,10 +29,62 @@
 	.text
 	.global _start
 _start:
+	mts	rmsr, r0	/* disable cache */
+	addi	r1, r0, CFG_INIT_SP_OFFSET
+	/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
+	addi	r6, r0, 0xb000	/* hex b000 opcode imm */
+	bslli	r6, r6, 16	/* shift */
+	swi	r6, r0, 0x0	/* reset address */
+	swi	r6, r0, 0x8	/* user vector exception */
+	swi	r6, r0, 0x10	/* interrupt */
+	swi	r6, r0, 0x20	/* hardware exception */
 
-	addi	r1, r0, CFG_SDRAM_BASE	/* init stack pointer */
-	addi	r1, r1, CFG_SDRAM_SIZE	/* set sp to high up */
+	addi	r6, r0, 0xb808	/* hew b808 opcode brai*/
+	bslli	r6, r6, 16
+	swi	r6, r0, 0x4	/* reset address */
+	swi	r6, r0, 0xC	/* user vector exception */
+	swi	r6, r0, 0x14	/* interrupt */
+	swi	r6, r0, 0x24	/* hardware exception */
 
-	brai	board_init
+#ifdef CFG_RESET_ADDRESS
+	/* reset address */
+	addik	r6, r0, CFG_RESET_ADDRESS
+	sw	r6, r1, r0
+	lhu	r7, r1, r0
+	shi	r7, r0, 0x2
+	shi	r6, r0, 0x6
+#endif
+
+#ifdef CFG_USR_EXCEP
+	/* user_vector_exception */
+	addik	r6, r0, _exception_handler
+	sw	r6, r1, r0
+	lhu	r7, r1, r0
+	shi	r7, r0, 0xa
+	shi	r6, r0, 0xe
+#endif
+
+#ifdef CFG_INTC_0
+	/* interrupt_handler */
+	addik	r6, r0, _interrupt_handler
+	sw	r6, r1, r0
+	lhu	r7, r1, r0
+	shi	r7, r0, 0x12
+	shi	r6, r0, 0x16
+#endif
 
+	/* hardware exception */
+	addik	r6, r0, _hw_exception_handler
+	sw	r6, r1, r0
+	lhu	r7, r1, r0
+	shi	r7, r0, 0x22
+	shi	r6, r0, 0x26
+
+	/* enable instruction and data cache */
+	mfs	r12, rmsr
+	ori	r12, r12, 0xa0
+	mts	rmsr, r12
+
+	/* jumping to board_init */
+	brai	board_init
 1:	bri	1b
diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c
index 026d247..273d9c4 100644
--- a/lib_microblaze/board.c
+++ b/lib_microblaze/board.c
@@ -1,6 +1,8 @@
 /*
+ * (C) Copyright 2007 Michal Simek
  * (C) Copyright 2004 Atmark Techno, Inc.
  *
+ * Michal  SIMEK <monstr@monstr.eu>
  * Yasushi SHOJI <yashi@atmark-techno.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -13,7 +15,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -30,8 +32,18 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-const char version_string[] =
-	U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
+const char version_string[] = U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ")";
+
+#ifdef CFG_GPIO_0
+extern int gpio_init (void);
+#endif
+#ifdef CFG_INTC_0
+extern int interrupts_init (void);
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+extern int eth_init (bd_t * bis);
+extern int getenv_IPaddr (char *);
+#endif
 
 /*
  * Begin and End of memory area for malloc(), and current "brk"
@@ -40,6 +52,18 @@ static ulong mem_malloc_start;
 static ulong mem_malloc_end;
 static ulong mem_malloc_brk;
 
+/*
+ * The Malloc area is immediately below the monitor copy in DRAM
+ * aka CFG_MONITOR_BASE - Note there is no need for reloc_off
+ * as our monitory code is run from SDRAM
+ */
+static void mem_malloc_init (void)
+{
+	mem_malloc_end = CFG_MONITOR_BASE + CFG_MONITOR_LEN;
+	mem_malloc_start = CFG_MONITOR_BASE;
+	mem_malloc_brk = mem_malloc_start;
+	memset ((void *)mem_malloc_start, 0, mem_malloc_end - mem_malloc_start);
+}
 
 void *sbrk (ptrdiff_t increment)
 {
@@ -50,7 +74,7 @@ void *sbrk (ptrdiff_t increment)
 		return (NULL);
 	}
 	mem_malloc_brk = new;
-	return ((void *) old);
+	return ((void *)old);
 }
 
 /*
@@ -68,24 +92,36 @@ void *sbrk (ptrdiff_t increment)
 typedef int (init_fnc_t) (void);
 
 init_fnc_t *init_sequence[] = {
-	serial_init,		/* serial communications setup */
+	env_init,
+	serial_init,
+#ifdef CFG_GPIO_0
+	gpio_init,
+#endif
+#ifdef CFG_INTC_0
+	interrupts_init,
+#endif
 	NULL,
 };
 
-void board_init(void)
+void board_init (void)
 {
 	bd_t *bd;
 	init_fnc_t **init_fnc_ptr;
-
-	/* Pointer is writable since we allocated a register for it. */
-	gd = (gd_t *)CFG_GBL_DATA_OFFSET;
-	memset((void *)gd, 0, CFG_GBL_DATA_SIZE);
-
-	gd->bd = (bd_t *)(gd+1);	/* At end of global data */
+	gd = (gd_t *) CFG_GBL_DATA_OFFSET;
+#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+	ulong flash_size = 0;
+#endif
+	asm ("nop");	/* FIXME gd is not initialize - wait */
+	memset ((void *)gd, 0, CFG_GBL_DATA_SIZE);
+	gd->bd = (bd_t *) (gd + 1);	/* At end of global data */
 	gd->baudrate = CONFIG_BAUDRATE;
-
 	bd = gd->bd;
 	bd->bi_baudrate = CONFIG_BAUDRATE;
+	bd->bi_memstart = CFG_SDRAM_BASE;
+	bd->bi_memsize = CFG_SDRAM_SIZE;
+
+	/* Initialise malloc() area */
+	mem_malloc_init ();
 
 	for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
 		WATCHDOG_RESET ();
@@ -94,6 +130,37 @@ void board_init(void)
 		}
 	}
 
+#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+	bd->bi_flashstart = CFG_FLASH_BASE;
+	if (0 < (flash_size = flash_init ())) {
+		bd->bi_flashsize = flash_size;
+		bd->bi_flashoffset = CFG_FLASH_BASE + flash_size;
+	} else {
+		puts ("Flash init FAILED");
+		bd->bi_flashstart = 0;
+		bd->bi_flashsize = 0;
+		bd->bi_flashoffset = 0;
+	}
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET)
+	char *s, *e;
+	int i;
+	/* board MAC address */
+	s = getenv ("ethaddr");
+	for (i = 0; i < 6; ++i) {
+		bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+		if (s)
+			s = (*e) ? e + 1 : e;
+	}
+	/* IP Address */
+	bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
+	eth_init (bd);
+#endif
+
+	/* relocate environment function pointers etc. */
+	env_relocate ();
+
 	/* main_loop */
 	for (;;) {
 		WATCHDOG_RESET ();
@@ -104,5 +171,5 @@ void board_init(void)
 void hang (void)
 {
 	puts ("### ERROR ### Please RESET the board ###\n");
-	for (;;);
+	for (;;) ;
 }
diff --git a/lib_microblaze/microblaze_linux.c b/lib_microblaze/microblaze_linux.c
index b3a0815..2c7885c 100644
--- a/lib_microblaze/microblaze_linux.c
+++ b/lib_microblaze/microblaze_linux.c
@@ -1,6 +1,8 @@
 /*
+ * (C) Copyright 2007 Michal Simek
  * (C) Copyright 2004 Atmark Techno, Inc.
  *
+ * Michal  SIMEK <monstr@monstr.eu>
  * Yasushi SHOJI <yashi@atmark-techno.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -13,7 +15,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -24,8 +26,146 @@
 
 #include <common.h>
 #include <command.h>
+#include <image.h>
+#include <zlib.h>
+#include <asm/byteorder.h>
 
-void do_bootm_linux(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
-		ulong addr, ulong *len_ptr, int   verify)
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+# include <status_led.h>
+# define SHOW_BOOT_PROGRESS(arg)        show_boot_progress(arg)
+#else
+# define SHOW_BOOT_PROGRESS(arg)
+#endif
+
+extern image_header_t header;	/* from cmd_bootm.c */
+/*cmd_boot.c*/
+extern int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
+
+void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
+		     ulong addr, ulong * len_ptr, int verify)
 {
+	ulong len = 0, checksum;
+	ulong initrd_start, initrd_end;
+	ulong data;
+	/* First parameter is mapped to $r5 for kernel boot args */
+	void (*theKernel) (char *);
+	image_header_t *hdr = &header;
+	char *commandline = getenv ("bootargs");
+	int i;
+
+	theKernel = (void (*)(char *))ntohl (hdr->ih_ep);
+
+	/* Check if there is an initrd image */
+	if (argc >= 3) {
+		SHOW_BOOT_PROGRESS (9);
+
+		addr = simple_strtoul (argv[2], NULL, 16);
+
+		printf ("## Loading Ramdisk Image at %08lx ...\n", addr);
+
+		/* Copy header so we can blank CRC field for re-calculation */
+		memcpy (&header, (char *)addr, sizeof (image_header_t));
+
+		if (ntohl (hdr->ih_magic) != IH_MAGIC) {
+			printf ("Bad Magic Number\n");
+			SHOW_BOOT_PROGRESS (-10);
+			do_reset (cmdtp, flag, argc, argv);
+		}
+
+		data = (ulong) & header;
+		len = sizeof (image_header_t);
+
+		checksum = ntohl (hdr->ih_hcrc);
+		hdr->ih_hcrc = 0;
+
+		if (crc32 (0, (char *)data, len) != checksum) {
+			printf ("Bad Header Checksum\n");
+			SHOW_BOOT_PROGRESS (-11);
+			do_reset (cmdtp, flag, argc, argv);
+		}
+
+		SHOW_BOOT_PROGRESS (10);
+
+		print_image_hdr (hdr);
+
+		data = addr + sizeof (image_header_t);
+		len = ntohl (hdr->ih_size);
+
+		if (verify) {
+			ulong csum = 0;
+
+			printf ("   Verifying Checksum ... ");
+			csum = crc32 (0, (char *)data, len);
+			if (csum != ntohl (hdr->ih_dcrc)) {
+				printf ("Bad Data CRC\n");
+				SHOW_BOOT_PROGRESS (-12);
+				do_reset (cmdtp, flag, argc, argv);
+			}
+			printf ("OK\n");
+		}
+
+		SHOW_BOOT_PROGRESS (11);
+
+		if ((hdr->ih_os != IH_OS_LINUX) ||
+		    (hdr->ih_arch != IH_CPU_MICROBLAZE) ||
+		    (hdr->ih_type != IH_TYPE_RAMDISK)) {
+			printf ("No Linux Microblaze Ramdisk Image\n");
+			SHOW_BOOT_PROGRESS (-13);
+			do_reset (cmdtp, flag, argc, argv);
+		}
+
+		/*
+		 * Now check if we have a multifile image
+		 */
+	} else if ((hdr->ih_type == IH_TYPE_MULTI) && (len_ptr[1])) {
+		ulong tail = ntohl (len_ptr[0]) % 4;
+
+		SHOW_BOOT_PROGRESS (13);
+
+		/* skip kernel length and terminator */
+		data = (ulong) (&len_ptr[2]);
+		/* skip any additional image length fields */
+		for (i = 1; len_ptr[i]; ++i)
+			data += 4;
+		/* add kernel length, and align */
+		data += ntohl (len_ptr[0]);
+		if (tail) {
+			data += 4 - tail;
+		}
+
+		len = ntohl (len_ptr[1]);
+
+	} else {
+		/*
+		 * no initrd image
+		 */
+		SHOW_BOOT_PROGRESS (14);
+
+		data = 0;
+	}
+
+#ifdef  DEBUG
+	if (!data) {
+		printf ("No initrd\n");
+	}
+#endif
+
+	if (data) {
+		initrd_start = data;
+		initrd_end = initrd_start + len;
+	} else {
+		initrd_start = 0;
+		initrd_end = 0;
+	}
+
+	SHOW_BOOT_PROGRESS (15);
+
+#ifdef DEBUG
+	printf ("## Transferring control to Linux (at address %08lx) ...\n",
+		(ulong) theKernel);
+#endif
+
+	theKernel (commandline);
 }
diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c
index 12e8488..3fa1b11 100644
--- a/lib_microblaze/time.c
+++ b/lib_microblaze/time.c
@@ -1,6 +1,8 @@
 /*
+ * (C) Copyright 2007 Michal Simek
  * (C) Copyright 2004 Atmark Techno, Inc.
  *
+ * Michal  SIMEK <monstr@monstr.eu>
  * Yasushi SHOJI <yashi@atmark-techno.com>
  *
  * See file CREDITS for list of people who contributed to this
@@ -22,6 +24,11 @@
  * MA 02111-1307 USA
  */
 
-void udelay(unsigned long usec)
+#include <common.h>
+
+void udelay (unsigned long usec)
 {
+	int i;
+	i = get_timer (0);
+	while ((get_timer (0) - i) < (usec / 1000)) ;
 }
diff --git a/microblaze_config.mk b/microblaze_config.mk
index b3ac8e0..06ddefa 100644
--- a/microblaze_config.mk
+++ b/microblaze_config.mk
@@ -22,7 +22,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_CPPFLAGS += -ffixed-r31
+PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__
 
 ifdef CONFIG_MICROBLAZE_HARD_MULT
 PLATFORM_CPPFLAGS += -mno-xl-soft-mul