summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTerry Lv <r65388@freescale.com>2010-03-22 17:38:48 +0800
committerTerry Lv <r65388@freescale.com>2010-03-22 17:53:45 +0800
commit1842946ef735d969e99be097812bbc383e7f8dc1 (patch)
tree2b0be95d12ad93ab8ac17b0259dd84e52d6278c7
parente84eaf4df6db1f4038580ec88d3e4a49624363eb (diff)
downloadu-boot-imx-1842946ef735d969e99be097812bbc383e7f8dc1.zip
u-boot-imx-1842946ef735d969e99be097812bbc383e7f8dc1.tar.gz
u-boot-imx-1842946ef735d969e99be097812bbc383e7f8dc1.tar.bz2
ENGR00121832: Some code reconstructure for u-boot
1. Remove board specific code in mxc_i2c.c. 2. Remove board specific code in mxc_fec.c. 3. Move imx_spi_nor.h to include/asm-arm. Signed-off-by: Terry Lv <r65388@freescale.com>
-rw-r--r--drivers/i2c/mxc_i2c.c16
-rw-r--r--drivers/mtd/spi/imx_spi_nor_atmel.c4
-rw-r--r--drivers/mtd/spi/imx_spi_nor_sst.c4
-rw-r--r--drivers/net/mxc_fec.c6
-rw-r--r--include/asm-arm/arch-mx51/imx_spi_nor.h70
-rw-r--r--include/configs/mx25_3stack.h1
-rw-r--r--include/configs/mx53_evk.h1
-rw-r--r--include/imx_spi_nor.h (renamed from include/asm-arm/arch-mx53/imx_spi_nor.h)0
8 files changed, 9 insertions, 93 deletions
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 7479c60..4c402c9 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -28,22 +28,6 @@
#if defined(CONFIG_HARD_I2C)
-#ifdef CONFIG_MX25
-#include <asm/arch/mx25.h>
-#include <asm/arch/mx25-regs.h>
-#elif defined(CONFIG_MX31)
-#include <asm/arch/mx31.h>
-#include <asm/arch/mx31-regs.h>
-#elif defined(CONFIG_MX35)
-#include <asm/arch/mx35.h>
-#elif defined(CONFIG_MX51_3DS)
-#include <asm/arch/mx51.h>
-#elif defined(CONFIG_MX53)
-#include <asm/arch/mx53.h>
-#else
-#error "Please include specific headfile "
-#endif
-
#define IADR 0x00
#define IFDR 0x04
#define I2CR 0x08
diff --git a/drivers/mtd/spi/imx_spi_nor_atmel.c b/drivers/mtd/spi/imx_spi_nor_atmel.c
index b6180a5..19a5197 100644
--- a/drivers/mtd/spi/imx_spi_nor_atmel.c
+++ b/drivers/mtd/spi/imx_spi_nor_atmel.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -29,7 +29,7 @@
#include <malloc.h>
#include <imx_spi.h>
-#include <asm/arch/imx_spi_nor.h>
+#include <imx_spi_nor.h>
static u8 g_tx_buf[256];
static u8 g_rx_buf[256];
diff --git a/drivers/mtd/spi/imx_spi_nor_sst.c b/drivers/mtd/spi/imx_spi_nor_sst.c
index 2d2b4a0..d484a51 100644
--- a/drivers/mtd/spi/imx_spi_nor_sst.c
+++ b/drivers/mtd/spi/imx_spi_nor_sst.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -29,7 +29,7 @@
#include <malloc.h>
#include <imx_spi.h>
-#include <asm/arch/imx_spi_nor.h>
+#include <imx_spi_nor.h>
static u8 g_tx_buf[256];
static u8 g_rx_buf[256];
diff --git a/drivers/net/mxc_fec.c b/drivers/net/mxc_fec.c
index 0e6c0b0..b828240 100644
--- a/drivers/net/mxc_fec.c
+++ b/drivers/net/mxc_fec.c
@@ -93,10 +93,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
+#if defined(CONFIG_MII_GASKET)
/*
- * * i.MX25 allows RMII mode to be configured via a gasket
- * */
+ * RMII mode to be configured via a gasket
+ */
#define FEC_MIIGSK_CFGR_FRCONT (1 << 6)
#define FEC_MIIGSK_CFGR_LBMODE (1 << 4)
#define FEC_MIIGSK_CFGR_EMODE (1 << 3)
diff --git a/include/asm-arm/arch-mx51/imx_spi_nor.h b/include/asm-arm/arch-mx51/imx_spi_nor.h
deleted file mode 100644
index 90c7ea7..0000000
--- a/include/asm-arm/arch-mx51/imx_spi_nor.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _IMX_SPI_NOR_H_
-#define _IMX_SPI_NOR_H_
-
-#define READ 0x03 /* tx: 1 byte cmd + 3 byte addr; rx: variable bytes */
-#define READ_HS 0x0B /* tx: 1 byte cmd + 3 byte addr + 1 byte dummy; rx: variable bytes */
-#define RDSR 0x05 /* read status register 1 byte tx cmd + 1 byte rx status */
-#define RDSR_BUSY (1 << 0) /* 1=write-in-progress (default 0) */
-#define RDSR_WEL (1 << 1) /* 1=write enable (default 0) */
-#define RDSR_BP0 (1 << 2) /* block write prot level (default 1) */
-#define RDSR_BP1 (1 << 3) /* block write prot level (default 1) */
-#define RDSR_BP2 (1 << 4) /* block write prot level (default 1) */
-#define RDSR_BP3 (1 << 5) /* block write prot level (default 1) */
-#define RDSR_AAI (1 << 6) /* 1=AAI prog mode; 0=byte prog (default 0) */
-#define RDSR_BPL (1 << 7) /* 1=BP3,BP2,BP1,BP0 RO; 0=R/W (default 0) */
-#define WREN 0x06 /* write enable. 1 byte tx cmd */
-#define WRDI 0x04 /* write disable. 1 byte tx cmd */
-#define EWSR 0x50 /* Enable write status. 1 byte tx cmd */
-#define WRSR 0x01 /* Write status register. 1 byte tx cmd + 1 byte tx value */
-#define ERASE_4K 0x20 /* sector erase. 1 byte cmd + 3 byte addr */
-#define ERASE_32K 0x52 /* 32K block erase. 1 byte cmd + 3 byte addr */
-#define ERASE_64K 0xD8 /* 64K block erase. 1 byte cmd + 3 byte addr */
-#define ERASE_CHIP 0x60 /* whole chip erase */
-#define BYTE_PROG 0x02 /* all tx: 1 cmd + 3 addr + 1 data */
-#define AAI_PROG 0xAD /* all tx: [1 cmd + 3 addr + 2 data] + RDSR */
- /* + [1cmd + 2 data] + .. + [WRDI] + [RDSR] */
-#define JEDEC_ID 0x9F /* read JEDEC ID. tx: 1 byte cmd; rx: 3 byte ID */
-
-/* Atmel SPI-NOR commands */
-#define WR_2_MEM_DIR 0x82
-#define BUF1_WR 0x84
-#define BUF2_WR 0x87
-#define BUF1_TO_MEM 0x83
-#define BUF2_TO_MEM 0x86
-#define STAT_READ 0xD7
-#define STAT_PG_SZ (1 << 0) /* 1=Page size is 512, 0=Page size is 528 (default 0) */
-#define STAT_PROT (1 << 1) /* 1=sector protection enabled (default 0) */
-#define STAT_COMP (1 << 6)
-#define STAT_BUSY (1 << 7) /* 1=Device not busy */
-#define CONFIG_REG1 0x3D
-#define CONFIG_REG2 0x2A
-#define CONFIG_REG3 0x80
-#define CONFIG_REG4 0xA6
-
-#define SZ_64K 0x10000
-#define SZ_32K 0x8000
-#define SZ_4K 0x1000
-
-#endif /* _IMX_SPI_NOR_H_ */
diff --git a/include/configs/mx25_3stack.h b/include/configs/mx25_3stack.h
index 796f3db..c58f2eb 100644
--- a/include/configs/mx25_3stack.h
+++ b/include/configs/mx25_3stack.h
@@ -155,6 +155,7 @@
#define CONFIG_MXC_FEC
#define CONFIG_MII
+#define CONFIG_MII_GASKET
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC0_IOBASE FEC_BASE
diff --git a/include/configs/mx53_evk.h b/include/configs/mx53_evk.h
index 17650d8..b65643d 100644
--- a/include/configs/mx53_evk.h
+++ b/include/configs/mx53_evk.h
@@ -151,6 +151,7 @@
#define CONFIG_MXC_FEC
#define CONFIG_MII
+#define CONFIG_MII_GASKET
#define CONFIG_DISCOVER_PHY
/*
diff --git a/include/asm-arm/arch-mx53/imx_spi_nor.h b/include/imx_spi_nor.h
index 9425d59..9425d59 100644
--- a/include/asm-arm/arch-mx53/imx_spi_nor.h
+++ b/include/imx_spi_nor.h