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authorHaiying Wang <Haiying.Wang@freescale.com>2009-05-20 12:30:32 -0400
committerKumar Gala <galak@kernel.crashing.org>2009-06-12 00:11:00 -0500
commit399b53cbab0b377ac4c5c16c19c6e41b68a9c719 (patch)
tree55dcd494b33e3753f112855ea1ed176221065c90
parentfb27949059f1bc84381a6216a819090f0cdbaa70 (diff)
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85xx: Add PIB support at CS4/CS5 for MPC8569MDS
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Yu Liu <Yu.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--include/configs/MPC8569MDS.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 21a7adf..0ee40c6 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -156,10 +156,18 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_BR0_PRELIM 0xfe000801
#define CONFIG_SYS_OR0_PRELIM 0xfe000ff7
-/*Chip slelect 1 - BCSR*/
+/*Chip select 1 - BCSR*/
#define CONFIG_SYS_BR1_PRELIM 0xf8000801
#define CONFIG_SYS_OR1_PRELIM 0xffffe9f7
+/*Chip select 4 - PIB*/
+#define CONFIG_SYS_BR4_PRELIM 0xf8008801
+#define CONFIG_SYS_OR4_PRELIM 0xffffe9f7
+
+/*Chip select 5 - PIB*/
+#define CONFIG_SYS_BR5_PRELIM 0xf8010801
+#define CONFIG_SYS_OR5_PRELIM 0xffffe9f7
+
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
#undef CONFIG_SYS_FLASH_CHECKSUM