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| author | Michael Walle <[michael@walle.cc]> | 2011-10-31 20:22:58 +0530 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-11-03 22:56:22 +0100 |
| commit | f779d739d67653c0d77f50cb18c315b2d39de075 (patch) | |
| tree | 3b519a5d1450d1a69647f8d9c50e4eb7927f6b2f | |
| parent | 8428a3991f3c76bcfd131288e28220338b1e58f3 (diff) | |
| download | u-boot-imx-f779d739d67653c0d77f50cb18c315b2d39de075.zip u-boot-imx-f779d739d67653c0d77f50cb18c315b2d39de075.tar.gz u-boot-imx-f779d739d67653c0d77f50cb18c315b2d39de075.tar.bz2 | |
kirkwood: define CONFIG_SYS_CACHELINE_SIZE
By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| -rw-r--r-- | arch/arm/include/asm/arch-kirkwood/config.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-kirkwood/config.h b/arch/arm/include/asm/arch-kirkwood/config.h index f17f82d..d1c1998 100644 --- a/arch/arm/include/asm/arch-kirkwood/config.h +++ b/arch/arm/include/asm/arch-kirkwood/config.h @@ -41,7 +41,8 @@ #include <asm/arch/kirkwood.h> #define CONFIG_ARM926EJS 1 /* Basic Architecture */ - +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* default Dcache Line length for kirkwood */ #define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ |