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authorƁukasz Majewski <l.majewski@samsung.com>2013-07-12 19:08:25 +0200
committerTom Rini <trini@ti.com>2013-07-16 09:20:16 -0400
commitf4eaf88e6d48ab2d0f978a25b916b92acdfd1df4 (patch)
tree5a8b408994431915a93757346ae134bb5816b8ee
parentf4ea9f86d155aa7845f151c7a37699cdc3e4db2b (diff)
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arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.
Provide proper setting for the APLL fout frequency calculation for Exynos4 based targets (especially Exynos4210 - Trats board). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/cpu/armv7/exynos/clock.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index 9f07181..5a5cfa1 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -141,18 +141,17 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k)
fout = (m + k / div) * (freq / (p * (1 << s)));
} else {
/*
- * Exynos4210
+ * Exynos4412 / Exynos5250
* FOUT = MDIV * FIN / (PDIV * 2^SDIV)
*
- * Exynos4412 / Exynos5250
+ * Exynos4210
* FOUT = MDIV * FIN / (PDIV * 2^(SDIV-1))
*/
if (proid_is_exynos4210())
- fout = m * (freq / (p * (1 << s)));
- else
fout = m * (freq / (p * (1 << (s - 1))));
+ else
+ fout = m * (freq / (p * (1 << s)));
}
-
return fout;
}