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| author | Matthieu CASTET <matthieu.castet@parrot.com> | 2012-03-19 15:35:25 +0100 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2012-09-17 16:17:28 -0500 |
| commit | d62e9caaaf7e6f5c7d86c9ea19170bfa5adda8be (patch) | |
| tree | ef94234877ba92201bc862f833ac0a980e1193b3 | |
| parent | a6f0c4faa4c65a7b7048b12c9d180d7e1aad1721 (diff) | |
| download | u-boot-imx-d62e9caaaf7e6f5c7d86c9ea19170bfa5adda8be.zip u-boot-imx-d62e9caaaf7e6f5c7d86c9ea19170bfa5adda8be.tar.gz u-boot-imx-d62e9caaaf7e6f5c7d86c9ea19170bfa5adda8be.tar.bz2 | |
mtd: support ONFI multi lun NAND
With onfi a flash is organized into one or more logical units (LUNs).
A logical unit (LUN) is the minimum unit that can independently execute
commands and report status.
Mtd does not exploit LUN, so make it see a big single flash where size is
lun_size * number_of_lun.
Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB.
Artem: split long line on 2 shorter ones.
This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux
Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com>
Acked-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
[scottwood@freescale.com: picked from Linux into U-Boot]
Reported-by: Rafael Beims <rafael.beims@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index bfd668f..50bfb65 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2573,7 +2573,8 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, mtd->writesize = le32_to_cpu(p->byte_per_page); mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); - chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; + chip->chipsize = le32_to_cpu(p->blocks_per_lun); + chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; *busw = 0; if (le16_to_cpu(p->features) & 1) *busw = NAND_BUSWIDTH_16; |